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Copper‐clad polyimide glass laminates that pass the GPY/Polyimide Specifications of IPC‐L‐108A have been developed using the Michael reaction of bismaleimide and m‐aminophenol. The addition reaction of m‐aminophenol to N‐phenylmaleimide has been confirmed from NMR, IR, and ultimate analysis. The peel strength of copper‐clad laminates is 1·8–2·0 kg/cm. The coefficient of expansion in the Z direction (25°C–246°C) is 0·96%. The glass transition temperature with post‐curing for an hour at 250°C is about 295°C. Water absorption by IPC‐L‐108A is 0·25%.

Specification by manufacturer's grade, restricts competition; company specifications proliferate test methods; both increase costs. BS.3888 was incompatible with foreign specifications. IEC Publication 249 promised internationally acceptable standards and led to the flexible approach to BS.4584 which allows for progressive additions to the range of test materials—now at seven—with a further seven in the foreseeable future.

FORMICA'S INVOLVEMENT IN LAMINATE MANUFACTURE Formica Limited's involvement in the development, manufacture and sales of industrial laminates began in 1930. These insulating laminates were used in a wide range of electrical and mechanical applications, and with the advent of printed circuit boards, Formica introduced copper clad paper phenolic laminates and was firmly established in this very fast growing market by 1960.

With the fatigue ductility test the ductility of metallic foils and flexible metal foil/dielectric laminates can be determined. Ductility together with tensile strength allows prediction of the fatigue behaviour of flexible printed wiring (FPW) in both the low‐cycle/high‐strain (ductility dependent) and the high‐cycle/low‐strain (strength dependent) ranges. However, for laminates and FPW with Kapton as the dielectric the standard fatigue ductility test method does not produce the expected results and flex life predictions deviate from experimental results. The results of a study to determine the cause of this anomalous behaviour of Kapton FPW and to find correlative correction procedures are reported. Corrections to account for both the cyclic strain‐hardening of rolled annealed copper foil and the Kapton/adhesive/copper interactions for asymmetric single‐sided FPW are presented. With these corrections the ductility determination for copper foil laminated to a Kapton substrate using the fatigue ductility test produces good results, and the fatigue life of symmetric Kapton FPW can be predicted from the copper foil properties. The underlying mechanisms for the strong deviational flex behaviour of asymmetric single‐sided FPW could not be identified. The recommendation is made that for high‐cycle flex applications the FPW construction be precisely symmetrical. FPW made from copper‐clad Kapton with rolled annealed copper foil is the overwhelming choice and it is important that one has proper acceptance criteria at incoming inspection and that a valid prediction methodology for FPW flexural resistance and fatigue behaviour is available.

‘Victrex’ polyethersulphone (PES) is introduced as a high temperature thermoplastic with properties attractive to the electronics industry. The polymer can be fabricated by conventional thermoplastic techniques, such as extrusion and moulding, and the parts metallised in several ways. Applications utilising these aspects are shown. Parts can be reflow or wave soldered and flux residues washed off without damaging the substrate. Some current PCB developments are discussed and a look into the future is offered as designers begin to take advantage of the thermoplastic nature of polyethersulphone.

The purpose of this paper is to present a new test method (tape peel method) to evaluate conformal coating adhesion to electronic assemblies.

The key issue for this method is the low cohesive force of conformal coatings, and hence selection of a supporting material to peel the coating from the substrate is critical. A suitable cloth material (35 per cent cotton +75 per cent polyester with 20 per cent open area) has been selected as a peel tape, and achieved the best bonding with coatings, and the smallest affect on the coating curing process. Using the tape, the peel force of the coating from the electronic assembly, can be measured quantitatively, and hence the adhesion performance of the conformal coating assessed.

The method was validated using different coating types, substrate materials (bare laminate with and without resist, copper clad laminate, and contaminated laminate material), assemblies and components. The results demonstrated that the tape peel test is a sensitive method for measuring coating adhesion on different materials found on PCB assemblies. Coating adhesion was found not to be effected by a wide range flux residues, but components and some resists presented a far greater coating challenge, with some coatings achieving very low adhesion values.

This new method for evaluating conformal coating adhesion to electronic assemblies will be of benefit to coating developers and users, and help to minimise adhesion failures in service. The test has been demonstrated to be sensitive to a number of process and material variables.

Underneath the foundation stone of the Tyseley factory, set in the wall of the Block 5 moulding materials building at 12 noon on April 15, 1930, are examples of phenolic mouldings, laminated materials and cast resin. The ceremony of laying the first stone was performed by Bakelite chairman, Sir James Swinburne, and witnessed by other directors and senior staff.

The hermetically sealed ceramic chip carrier package and the plastic small outline (SO) IC package are both now widely used in hybrid microelectronics. These packages are currently being applied with other discrete surface mount devices to PWB technology in order to increase circuit density and reduce weight. This paper discusses the evaluation of two soldering techniques for the attachment of the chip carrier and SOIC packages to epoxy glass PWBs: the first by solder cream printing or pretinning of the circuit board and subsequent attachment by solder reflow, and the second by a novel jet soldering technique. The thermally induced expansion mismatch between epoxy glass and ceramic chip carriers and the strain induced fatigue this causes in the solder joints are now well documented, and results are presented for the effects of temperature cycling ceramic chip carriers soldered onto PWBs. Various PWB materials have been assessed including FR4, elastomer coated FR4, polyimide kevlar, and epoxy glass laminated copper clad invar. Reliability of these assemblies is discussed in terms of the appearance of micro‐cracks in the solder fillets and the occurrence of electrical discontinuity in the solder joints during temperature cycling.

The problems associated with the direct attachment of leadless ceramic chip carriers (LCCCs) to conventional PWB structures subjected to ambient thermal and power (on/off) cycling are now widely documented. The reliability of LCCCs mounted on various novel substrate materials has been assessed here during ambient thermal cycling from −55° to 125°C and −20° to +70°C and during power heat cycling. Polyimide Kevlar material was rejected on the basis that microcracks, formed in the laminate during thermal cycling, propagated to the surface and resulted in copper track breakages. A flexible laminate interconnection structure for strain relief was found to be too cumbersome for most applications and gave only a small reliability improvement. Polyimide quartz and copper‐invar‐copper cored materials were both found to give a high degree of reliability in thermal cycling. The metal cored laminate is preferred because it is also a more rigid structure with the better thermal conductance needed for many high performance and reliability applications. An elastomer coated FR4 material also performed well during lower temperature thermal and power cycling tests and represents a reduced cost option for less severe environments.

This paper describes recent printed board applications in circuit manufacturing on novel non‐laminate substrates. It specifically discusses properties pertinent to metal core, thermal plastics, and new processing conditions for circuitising the new substrates. Techniques explored are intended to provide rigidity, flatness, dimensional stability and improved thermal management.