Search results

Existing control circuits for piezoelectric energy harvesting (PEH) suffers from long startup time or high power consumption. This paper aims to design an ultra-low power control circuit that can harvest weak ambient vibrational energy on the order of several microwatts to power heavy loads such as wireless sensors.

A self-powered control circuit is proposed, functioning for very brief periods at the maximum power point, resulting in a low duty cycle. The circuit can start to function at low input power thresholds and can promptly achieve optimal operating conditions when cold-starting. The circuit is designed to be able to operate without stable DC power supply and powered by the piezoelectric transducers.

When using the series-synchronized switch harvesting on inductor circuit with a large 1 mF energy storage capacitor, the proposed circuit can perform 322% better than the standard energy harvesting circuit in terms of energy harvested. This control circuit can also achieve an ultra-low consumption of 0.3 µW, as well as capable of cold-starting with input power as low as 5.78 µW.

The intermittent control strategy proposed in this paper can drastically reduce power consumption of the control circuit. Without dedicated cold-start modules and DC auxiliary supply, the circuit can achieve optimal efficiency within one input cycle, if the input signal is larger than voltage threshold. The proposed control strategy is especially favorable for harvesting energy from natural vibrations and can be a promising solution for other PEH circuits as well.

This paper aims to propose a new unified and non-ideal switch model for analysis of switching circuits.

The model has a single unified structure that includes all possible states (on, off) of the switches. The analysis with the proposed switch model requires only one topology and uses the single system equation regardless of states of switches. Moreover, to improve accuracy, the model contains the on-state resistance and capacitive effect of switches. The system equations and the states of switches are updated by control variables, used in the model.

There are no restrictions on circuit topology and switch connections. Switches can be internally and externally controlled. The non-ideal nature of the model allows the switch to be modeled more realistically and eliminates the drawbacks of the ideal switch concept. After modeling with the proposed switch model, a linear circuit is obtained. Two examples related to switching circuits are included into the study. The results confirm the accuracy of the model.

This paper contributes a different switch model for analysis of switching converters to the literature. The main advantage of the model is that it has a unified and non-ideal property. With the proposed switch model, the transient events, like voltage spikes and high-frequency noises, caused by inductor and capacitor elements at switching instants can be observed properly.

The circuit elements of every printed circuit board have the potential for failure during test and/or use. These failures can occur by forming short‐circuits between adjacent circuit elements, or by forming open‐circuits in the conductors. The risk sites can be identified by type, and the total number enumerated by manual inspection of the photolithographic masks used to fabricate the printed circuit layers. However, the circuit density of high performance printed circuit boards has become so great that meaningful manual analysis has become impractical. A more effective method is to use special graphics programs to analyse the computer‐aided design (CAD) data. The methodology developed to perform the CAD analysis of high performance printed circuit boards for short‐circuits utilises two powerful computer graphic tools: the Interactive Graphics System and the Unified Shapes Checking system. Test data for open‐circuits are generated using specially written alphanumeric routines. The data can be used for stress testing the printed circuit boards by wiring up special test modules that are plugged into the boards and then placing the boards into environmental test chambers. The printed circuits are checked for short‐circuits by putting them into groups that have no risk of shorting to each other (zero risk), and placing the groups in parallel under an electrical potential. The flow of current between the groups would indicate a short‐circuit. Similarly, the printed circuits can be checked for open‐circuits, by stringing them together into groups in series, and measuring the changes in resistance under thermal stress. Both types of test data can also be used for in‐process testing.

Seeks to answer the question: have the reasons for using flex‐rigid circuit boards changed through the years?

The paper presents the development of flex‐rigid circuit board construction techniques from the first applications to the current status of a modern interconnection system. The paper discusses that it was the military and avionic industry that in the past required an interconnection technique that was reliable under environmental stress but compact and lightweight. Today it is the automotive and communication industry that is driving the development of printed circuit board technology.

Finds that wiring and interconnection must be cheap, reliable, light in weight, and must fit into very small housings. The demand for complex interconnection solutions like the flex‐rigid circuit technique is rising with the increased level of integration of more functions into electronic devices. The reasons for using flex‐rigid circuitries are nearly still the same as in the beginning.

Shows how the flex‐rigid circuit board technology has developed during the last 30 years.

The environmental reliability of Series Q, a system of materials designed for advanced ‘HIC’ circuits, has been studied using three different migration‐resistance tests. —LMRT: a test which is used to assess the resistance to electrochemical migration of horizontally adjacent, closely spaced conductor tracks in a high‐temperature, high‐humidity environment with a voltage bias present (60°C, 90%RH, 48 VDC). —HHBT: a test which monitors the ability of a dielectric to resist electrochemical migration when vertically adjacent crossover conductor tracks are oppositely biased (85°C, 85%RH, 5 VDC). —HBT: a test which measures how well a dielectric can sustain its resistance to voltage breakdown over extended periods of time during continuous exposure to conditions of high temperature and voltage (150°C, 200 VDC). The results show that the QSil™ and QPIus™ systems, the two materials systems that comprise Series Q, demonstrate excellent performance in all three areas. Predictions of how well circuits made from these materials will survive in their operating ambient over the long term, e.g., twenty years, have been made.

The increasing use of high switching speed systems in both microwave electronics and high speed logic devices has created the need for printed circuit boards which are based on low dielectric constant and low loss materials. In addition, these circuit materials must be capable of withstanding elevated temperatures typical of hostile service environments and of board fabrication processes. Such low dielectric constant rigid boards are commercially available from a few sources. However, there is a growing demand for low dielectric constant flexible printed circuit boards for interconnecting rigid boards or in rigid/flex applications where high speed, fast rise times, controlled impedance and low crosstalk are important. A new family of thin laminates which are suitable for fabrication of flexible low dielectric constant printed circuit boards have been developed by Rogers Corporation. These circuit materials are called ROhyphen;2500 laminates and offer flexible interconnections in high speed electronic systems. RO‐2500 circuit materials are based on microglass reinforced fluorocarbon composites and have a typical dielectric constant of 25. The transmission line properties of these materials have been evaluated by the IPC‐FC‐201 test method. The results indicated that these circuit materials improve the propagation velocity by about 10% and the rise time by about 30% when compared with the same geometry, polyimide film based, flexible PCs in stripline constructions. Also, dimensional stability of these laminates after etch and heat ageing is improved over that of the standard flex circuit materials based on polyimide film. RO‐2500 laminate properties have been evaluated by the IPC‐TM‐650 test methods, which are widely accepted by the flexible PCB industry.

The purpose of this paper is to propose a fast synthesis method of the equivalent circuits of electromagnetic devices using model order reduction. Finite element method (FEM) has been widely used to design electromagnetic devices. For FE analysis of these devices connected to control and deriving circuits, FE equations coupled with the circuit equations have to be solved for many times in their design processes. If the FE models are replaced by equivalent circuit models, computational time could be drastically reduced.

In the proposed method, a reduced FE model is obtained using proper orthogonal decomposition (POD) in which the size of FE equation is effectively reduced so that the computational time for FE analysis is shortened. Then, the equivalent circuits are directly synthesized from the admittance function of the reduced system.

Accuracy and computational efficiency of the proposed method are compared with those of another POD-based method in which the equivalent circuits are synthesized from fitting of frequency characteristics using optimization algorithm. There are no significant differences in the accuracy of both methods, while the speedup ratio of the former method is found larger than that for the latter method for the same sampling points.

The equivalent circuits of electric machines and devices have been synthesized on the basis of physical insight of engineers. This paper proposes a novel method by which the equivalent circuits are automatically synthesized from FE model of the electric machines and devices using POD.

The purpose of this paper is to design a voltage reference circuit for current source of radio frequency integrated circuit blocks. The voltage reference circuit is called voltage for current source (VCS).

The circuit concept is discussed. A voltage‐controlled oscillator (VCO) and buffer circuit together with VCS circuit are built to prove the concept. Though the VCS circuit employs no array of diode like standard bandgap circuit, it still employs the concept of proportional to absolute temperature (PTAT) and a complement to absolute temperature (CTAT) elements. The integrated VCO, together with VCO core and VCO buffer circuits, are designed for W‐CDMA application particularly for the demodulator section. All circuits are built in f_T=45 GHz SiGe BiCMOS process.

At 760 MHz the power consumption for core circuit is 0.6 and 3.3 mA for VCO buffer amplifier. The fabricated VCO circuit together with VCO buffer was tested and measured with VCO output of −6 dBm at 760 MHz with variation of 0.1 dBm across −40°C to 85°C.

A voltage reference circuit which is derived from PTAT and CTAT current generators is presented. The circuit is capable of providing a constant current across absolute temperature or a current PTAT.

Current-mode approach promises faster and more precise comparators that lead to high-performance and accurate winner-take-all circuits. The purpose of this paper is to present a new high-performance, high-accuracy current-mode min/max circuit for low-voltage applications. In addition, the proposed circuit is designed based on a new efficient high-resolution current conveyor-based fully differential current comparator.

The proposed design detects the min and max values of two analog current signals by means of a current comparator and a logic module. The comparator compares the values of the input current signals accurately and generates two digital control signals and the logic module determines the min and max values based on the controls signals. In addition, an accurate current copy module is utilized to copy the input current signals and convey them to the comparator and the logic module.

The results of the comprehensive simulations, conducted using HSPICE with the TSMC 90 nm CMOS technology, demonstrate the high-performance and robust operation of the proposed design even in the presence of process, temperature, input current and supply voltage variations. For a case in point, for 5 μA differential input current the average propagation delay and power consumption of the proposed circuit are attained as 150 ps and 150 µW, respectively, which leads to more than 64 percent improvement in terms of power-delay product as compared with the most efficient design, previously presented in the literature.

A new efficient structure for current-mode min-max circuit is proposed based on a novel current comparator design which is accurate, high-performance and robust to process, voltage and temperature variations.

The theoretical method of converting the magnetic circuit into an electric circuit is mature, but the way to determine the inductances in the electric circuit is not reliable, especially for the core working in saturation status, and it is impossible to determine the inductances by the transformer terminal measurements, as the measurement information is not enough to determine a number of inductances. This paper aims to propose an approach of calculating the reluctances.

In this paper, an approach of calculating the reluctances is proposed based on the numerical simulation of magnetic field in transformer with different values of current excitation. The reluctance of a core segment or air region as a branch of magnetic circuit is obtained by the magnetic energy and magnetic flux. By this way, all the reluctances as function of flux can be determined, and then the inductances can be determined. The reluctances and equivalent electric circuit of three-phase integrative transformer is determined, and its validation is proved in the paper.

The single phase example shows that the proposed method has a good performances on analysis of the inrush current in deep saturation. The peak value of the inrush current derived from the proposed approach matches well with the results obtained by coupled circuit-FEM analysis, and the difference is about 4.8 per cent. For studies on dual models of single phase transformers, the leakage inductances have important effects on the peak value of the inrush current. The reluctances of three-phase transformer are calculated, and the equivalent circuit simulation results are slightly smaller than the coupled circuit-FEM simulation results.

Approach of calculating the reluctances based on the numerical simulation of magnetic field in transformer is proposed. The magnetic core and air space are divided into several segments, and the reluctance for each segment is calculated based on the energy in the region and the flux of the cross-sectional area. By applying various excitation currents, all the reluctances as function of flux can be determined, and then all the non-linear inductances including the non-linear leakage inductances are obtained. The proposed approach is reliable to determine a number of inductances in the dual electric circuit, especially for deep saturation status.