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This paper aims to investigate the difference between the impacts of indicators of trade barriers (TBs) on bankrupt enterprises (BEs), new enterprises (NEs) and other enterprises (OEs).

The paper has used a multiple-step approach. At the first stage, the initial data has been collected from interviews with 164 top managers of SMEs in West Azerbaijan in Iran during two periods of 2013–2015 and 2017–2019. At the second step, multiple correspondence analysis has been used to summarize the relationships between variables and construct indices for different groups of TBs. Finally, the generalized structural equation model method was used to examine the impact of export barriers.

The results showed that the political legal index is the main TBs for BEs and NEs, but it had a more significant impact on BEs; the financial index was the second major TBs factor for BEs, while OEs did not have a problem in performance index, and the financial index was classified as a minor obstacle for them. All indicators of marketing barriers (except production index) had a negative and significant effect on all enterprises; the most important TBs for NEs was the information index.

The results indicated that if enterprises have a strong financial system and function, they can lessen the impact of sanctions and keep themselves in the market.

This paper aims to review in-memory computing (IMC) for machine learning (ML) applications from history, architectures and options aspects. In this review, the authors investigate different architectural aspects and collect and provide our comparative evaluations.

Collecting over 40 IMC papers related to hardware design and optimization techniques of recent years, then classify them into three optimization option categories: optimization through graphic processing unit (GPU), optimization through reduced precision and optimization through hardware accelerator. Then, the authors brief those techniques in aspects such as what kind of data set it applied, how it is designed and what is the contribution of this design.

ML algorithms are potent tools accommodated on IMC architecture. Although general-purpose hardware (central processing units and GPUs) can supply explicit solutions, their energy efficiencies have limitations because of their excessive flexibility support. On the other hand, hardware accelerators (field programmable gate arrays and application-specific integrated circuits) win on the energy efficiency aspect, but individual accelerator often adapts exclusively to ax single ML approach (family). From a long hardware evolution perspective, hardware/software collaboration heterogeneity design from hybrid platforms is an option for the researcher.

IMC’s optimization enables high-speed processing, increases performance and analyzes massive volumes of data in real-time. This work reviews IMC and its evolution. Then, the authors categorize three optimization paths for the IMC architecture to improve performance metrics.