Search results

The purpose of this paper is to discuss the effect of electric reverse stress currents on the performance of photovoltaic solar modules.

The effect of a reverse introduced current as a function of time is studied on the I‐V and C‐V characteristics and parameters which were extracted and analyzed using numerical analysis based on a reliable double exponential model.

The effect of an introduced reverse current for different periods simulated the effect of accumulated extreme reverse currents which may arise in solar cells and modules due to different reasons, causing dramatic changes in the shunt resistance as well as other characteristics, mainly when the time of the current application exceeded a certain limit.

The paper contributes to the research on the damaging effects of reverse currents on the normal operation of the solar cells and modules.

The purpose of this paper is to discuss the temperature failure effect on electronic components and their electrical parameters variation.

The MOSFET device parameters analysis was done by numerical analysis based on a double exponential model using the integrated pn junction.

The temperature dependence of these parameters is investigated; their evolution allows the evaluation of device's operation reliability in high‐temperature environments.

The paper demonstrates how the temperature affect the normal operation of the electronic device and the model accuracy is investigated at high temperature.

This article shows that irradiation with neutrons can be used as solution to harden commercial (COTS: Commercial‐Off‐The‐Shelf) n‐channel power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) devices against destructive events induced by heavy ion irradiation. Atomic displacements created in silicon, by neutron irradiations, result in traps and recombination centers which reduce the electron‐hole pairs density generated by the heavy ion within the device. These results highlight a strong reduction in the photo‐current generated by the heavy ion, correlated with a reduction of the carrier lifetime.

This paper presents measurements of device switching parameters performed on a commercial power MOSFET under high temperature conditions, along with the inverse and direct source‐drain current.

Device temperature was linearly increased from 20 to 300°C. Switching times were measured by monitoring the current waveforms when the device was turned off and on. The gate was biased by a 10 V square signal while a 50 V DC bias was applied between the drain and source. The inverse current was measured under Vg=0V.

The device response to being turned off becomes faster at high temperatures. The inverse leakage current is insignificant under 300°C but it increases rapidly after this limit. The direct saturation current increases with temperature for the same gate tension. These phenomena were associated to the thermal activation of defects.

This paper offers information about switching performance of low cost commercial MOS devices in high temperature conditions. This information is essential in the microelectronic industry of harsh environments.

This work aims to investigate the modifications in a transistor behavior after hot carrier injection processes from the integrated junction.

A high voltage is applied across the drain‐source contacts, so a reverse current is induced through the integrated junction and defects are then created.

The results point out to a dependence of the VDMOSFET reliability on the operating conditions which could induce parasitic effects on the structure. Induced defects alter the form of several MOSFET characteristics.

A new method of degradation is presented along with a series of characterization techniques‐based electrical parameters variations.

The purpose of this work is to highlight the evolutions of the switching times parameters of commercial vertical diffuse metal oxide semiconductor field effect transistors after a hot carrier injection in the reverse bias pn junction.

Experiment was done basically by hot carrier injection, where a large drain‐source voltage V_DS is applied to reverse bias the body drain junction, then inducing a 30 mA reverse current. The drain polarization was increased gradually, by steps of 0.5 V/s, up to desired V_DS value in order to prevent sudden breakdown. Switching time parameters were measured at different temperatures and up to 300°C.

The experimental results show that the device rise time decreases significantly for the first period of stress time at room temperature, which increases the speed of the device during this turn‐on switch. This event was associated with the high‐electric field in the junction region that pulls electrons from the oxide gate into the channel, thus leaving trapped holes in the oxide bulk due to their low mobility.

This research study has an important value in terms of engineering application where speed of electronic devices is one of the most valuable parameters in the communication and information technology fields.

The purpose of this paper is to investigate the dark properties as a function of reverse current induced defects. Dark characteristics of solar modules are very essential in the understanding the functioning of these devices.

Reverse currents were applied on the photovoltaic (PV) modules to create defects. At several time intervals, dark characteristics along with surface temperature were measured.

Current-voltage (I-V) and capacitance-voltage (C-V) characteristics furnished valuable data and threshold values for reverse currents. Maximum module surface temperatures were directly related to each of the induced reverse currents and to the amount of leakage current. Microstructural damages, in the form of hot spots and overheating, are linked to reverse current effects. Experimental evidence showed that different levels of reverse currents are a major degrading factor of the performance of solar cells and modules.

These results give a reliable method to predict most of the essential characteristics of a silicon solar cell or a module. Similar test could help predict the amount of degradation or even the failure of PV modules.

The purpose of this paper is to apply a negative gate bias stress in order to study instabilities of threshold voltage in N‐channel power vertical double‐diffused metal‐oxide‐semiconductor field effect transistor (VDMOSFET). Variations in gate oxide trapped charge and interface trap densities are also calculated.

A threshold voltage shift is detected; the oxide and interface trap densities were evaluated based on a direct measurement of the gate to source capacitance and conductance.

Results presented show that the threshold voltage is decreasing with stress time, the capacitance and conductance curves are altered by applied stress, also the oxide traps and the interface traps densities are increasing with stress time.

The positive bias stress seems to be more destructive in the case of the studied devices.

Developments in neutron detection technology during the past three years are reviewed with special emphasis on application to safety, security, or industrial development.An investigation about the possibility of using N‐channel power MOSFET (metal oxide semiconductor field effect transistor) as a high‐energy neutron sensitive detector is presented here. An empirical expression for neutron fluence detection is derived from the relation between neutron fluence and the evolution of the transistor current measured in the saturation region. This expression is valid for neutron fluence in the range 5×10⁹–1×10¹⁴ n cm⁻².

The aim of this paper is to provide some specific information on the effects of DC voltage stress on the current, rise time (Tr) and fall time (Tf), at switching between on and off state of power n‐MOSFET devices.

A constant positive electrical stress voltage technique is used to study the devices in this work by giving the gate a positively bias with respect to source and a short circuit of the drain with the grounded source. Voltage stress is gradually increased by automatic 1 V step until it reaches the max tolerated value by the gate dielectric (70 V for device studied in this paper). Response of the device for electrical stress was measured for different doses (stress time).

The experimental results show that the rise time increases the beginning of stress dose and then it almost stabilises with time, while fall time decreases at first and then starts to increase for higher stress time. The modification of the device switching time parameters were associated to positive oxide charge and interface state Si/SiO₂ effects.

This paper offers new information concerning a very important field in microelectronic devices where the switching speed of the components becomes a major requirement. The technique used to improve the device speed has a very low cost and a simple feasibility.