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1 – 10 of 116Zhenqi Liu, Jie Wang, Jianhan Chen, Xiya Liu, Yibin Yin and Chaolei Ban
The purpose of this study is to explore the mechanism of branch pits and tunnels formation and increase the specific surface area and capacitance of anode Al foil for high voltage…
Abstract
Purpose
The purpose of this study is to explore the mechanism of branch pits and tunnels formation and increase the specific surface area and capacitance of anode Al foil for high voltage electrolytic capacitor by D.C. etching in acidic solution and neutral.
Design/methodology/approach
Al foil was first D.C. etched in HCl-H2SO4 mixed acidic solution to form main tunnels perpendicular to the Al surface, and then D.C. etched in neutral NaCl solution including 0.5 per cent C6H8O7 and Cu(NO3)2 with different concentration to form branch tunnels normal to Al surface. Between two etching, Cu nuclei were electroless deposited on the interior surface of main tunnels by natural occluded corrosion cell effect to form micro Cu-Al galvanic local cells. The effects of electroless deposited Cu nuclei on cross-section etching morphologies and electrochemical behavior of Al foil was investigated with SEM, polarization curve and electrochemical impedance spectroscopy (EIS).
Findings
The results show that sub branch tunnels can form along the main tunnels owing to the formation of Cu-Al micro-batteries, in which Cu is cathode and Al is anode. With increase in Cu(NO3)2 concentration, more Cu nuclei can be electroless deposited and serve as the favorable sites for branch tunnel initiation along the whole length of main tunnels, leading to enhancement in specific capacitance of anode Al foil.
Originality/value
Cu nuclei were electroless deposited on the interior surface of main tunnels by natural occluded corrosion cell effect to form micro Cu-Al galvanic local cells, which can serve as the favorable sites for branch tunnel initiation along the main tunnels to enhance specific capacitance of anode Al foil.
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In Part 1, background information on mechanical properties and metallurgy of solder alloys and soldered joints has been presented. In Part 2, mechanisms of damage and degradation…
Abstract
In Part 1, background information on mechanical properties and metallurgy of solder alloys and soldered joints has been presented. In Part 2, mechanisms of damage and degradation of components and soldered joints during soldering, transport and field life have been discussed, the most important mechanism being low cycle fatigue of the solder metal. In this third part, the determination of the fatigue life expectancy of soldered joints is discussed. Accelerated testing of fatigue is needed, as the possibilities of calculations are strongly limited. A temperature cycle test under specified conditions is proposed as a standard. A model is worked out for the determination of the acceleration factor of this test. A compilation of a number of solder fatigue test results, generated in the author's company, is presented.
Cherry Bhargava, Vijay Kumar Banga and Yaduvir Singh
An electrolytic capacitor is extensively used as filtering devices in various power supplies and audio amplifiers. Low cost and higher value of capacitance make it more well…
Abstract
Purpose
An electrolytic capacitor is extensively used as filtering devices in various power supplies and audio amplifiers. Low cost and higher value of capacitance make it more well known. As environmental stress and electrical parameters increase, capacitors degrade on accelerated pace. The paper aims to discuss these issues.
Design/methodology/approach
This paper focusses on the impact of thermal stress on electrolytic capacitors using accelerated life testing technique. The failure time was calculated based on the change in capacitance, equivalent series resistance and weight loss. The experimental results are compared with the outcome of already available life monitoring methods, and the accuracy level of these methods is accessed.
Findings
The results of all the three methods are having maximum 55 per cent accuracy. To enhance the accuracy level of theoretical methods, modifications have been suggested. A new method has been proposed, whose outcome is 92 per cent accurate with respect to experimentally obtained outcomes.
Practical implications
To assess the capacitor’s reliability using an experimental and modified theoretical method, failure prediction can be done before it actually fails.
Originality/value
A new method has been proposed to access the lifetime of capacitor.
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V.N.A. Naikan and Arvind Rathore
The purpose of this paper is to focus on conducting accelerated life tests on aluminium electrolytic capacitors under accelerated temperature and voltage stress to study the…
Abstract
Purpose
The purpose of this paper is to focus on conducting accelerated life tests on aluminium electrolytic capacitors under accelerated temperature and voltage stress to study the effect of applied voltage and ambient temperature on the capacitor, its degradation over time, failure data collection, analysis and then modelling the failure times. Principles of DOE are used for studying the effect of temperature and voltage.
Design/methodology/approach
Life tests are conducted at three levels of temperature and applied voltage and the life of capacitor is ascertained at each treatment level. Life variation with voltage and temperature is studied to gain an insight as to how these factors affect the lifetime of the capacitor. The interaction effect of temperature and voltage on capacitor life is also established.
Findings
The life of the capacitor decreases exponentially with temperature and voltage at all the three factor levels. Ambient temperature, applied voltage and their interaction effect significantly affects the life of the capacitor. Applied voltage has the greatest effect followed by ambient temperature and then their interaction effect. Life of the capacitor has been estimated as 4,206 hrs when only voltage is taken as the accelerated stress using Inverse Power Law and as 4,003 hrs when both temperature and voltage are taken as accelerating stress using combination model.
Research limitations/implications
This work consider only decrease in capacitance as the failure criterion. However, as a future scope, it is proposed that test may be conducted by taking into consideration not only the decrease in capacitance as the failure criteria but by monitoring all the performance parameters of the capacitor. This would give a more realistic assessment of life as it is possible that capacitor may have failed much before it reached the lower threshold capacitance value.
Practical implications
This work has lots of practical implications. It shows how DOE approach can be used for ALT data analysis and identification and effect of critical stresses acting on capacitors in real practice. Most critical types of stresses affecting the reliability can thus be controlled to ensure better performance. Product manufactures as well as users will be benefited by such findings. The paper has also illustrated how failure data can generated by degradation analysis using life test data collection at discrete intervals.
Originality/value
The methodology presents an alternative non traditional approach of accelerated life testing, which does not require continuous monitoring of test items. This only requires intermittent monitoring which reduces the need of test resources. Though the degradation study itself is not new but using degradation study for ALT data generation is new. This approach may considerably reduce the test duration and resources used for ALT. DOE approach gives more tangible result to study the effect of various variables on the dependent variable. As DOE approach uses a fractional factorial design, it can be very helpful to conduct life tests with minimum number of test units (only a fraction of full factorial test units). This will considerably reduce the test duration, resources requirement for testing, easier but accurate data analysis, and faster product development, especially when ALT is to be conducted at several stresses simultaneously.
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Daniel Straubinger, Attila Toth, Viktor Kerek, Zsolt Czeczei, Andras Szabo and Attila Geczy
The purpose of this paper is to study the solder beading phenomenon (referring to larger-sized solder balls) of surface-mounted electrolytic capacitors. Solder beading could…
Abstract
Purpose
The purpose of this paper is to study the solder beading phenomenon (referring to larger-sized solder balls) of surface-mounted electrolytic capacitors. Solder beading could induce failures by violating the minimal electrical clearance on the printed circuit board (PCB). In modern lead-free reflow soldering, especially in high-reliability industries, such as automotive, aeroplane and aerospace, detecting and preventing such defects is essential in reliable and cost-effective manufacturing.
Design/methodology/approach
The large size of the involved components may block the view of automatic optical inspection; therefore, X-ray inspection is necessary. To detect the failure mode, X-ray imaging, cross-section grinding, optical microscopy and Fourier transformed infrared spectroscopy were used. High-resolution noncontact profilometry and optical microscopy were used to analyse component designs. The surface mounting process steps were also analysed to reveal their dependence on the issue. Test methods were designed and performed to reveal the behaviour of the solder paste (SP) during the reflow soldering process and to emphasise the component design relevance.
Findings
It was found that the reduction of SP volume only reduces the failure rate but does not solve the problem. Results show that excessive component placement pressure could induce solder beading. Statistical analysis revealed that differences between distinct components had the highest effect on the solder beading rate. Design aspects of solder beading-prone components were identified and discussed as the primary source of the problem.
Practical implications
The findings can be applied in surface-mount technology production, where the total failure count and resulting failure costs could be reduced according to the findings.
Originality/value
This paper shows that component design aspects such as the low distance between the underside of the component and the PCB and blocked proper outgassing of volatile compounds of the SP can be root causes of solder beading under surface-mounted electrolytic capacitors.
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The purpose of this paper is to compare the suitability of fractional derivatives in the modelling of practical capacitors. Such suitability refers to ability to provide the…
Abstract
Purpose
The purpose of this paper is to compare the suitability of fractional derivatives in the modelling of practical capacitors. Such suitability refers to ability to provide the analytical capacitance function that matches the experimental ones of each fractional derivative.
Design/methodology/approach
The analytical capacitance functions based on various fractional derivatives of both local and nonlocal types including the author’s have been derived. The derived capacitance functions have been simulated and compared with the experimental ones of aluminium electrolytic and electrical double layer capacitors (EDLCs).
Findings
This paper has found that any local fractional derivative with fractional power law-based relationship with the conventional one is suitable for modelling the aluminium electrolytic capacitor (AEC) by incorporating with the conventional capacitance definition. On the other hand, the author’s nonlocal fractional derivatives have been found to be more suitable than the others for modelling the EDLC by incorporating with the revisited definition of capacitance.
Originality/value
The proposed comparative analysis has been originally presented in this work. The criterion for local fractional derivative, to be suitable for modelling the AEC, has been found. The nonlocal fractional operators which are most suitable for modelling the EDLC have been derived where the unsuitable one has been pointed out.
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Cherry Bhargava, Pardeep Kumar Sharma and Ketan Kotecha
Capacitors are one of the most common passive components on a circuit board. From a tiny toy to substantial satellite, a capacitor plays an important role. Untimely failure of a…
Abstract
Purpose
Capacitors are one of the most common passive components on a circuit board. From a tiny toy to substantial satellite, a capacitor plays an important role. Untimely failure of a capacitor can destruct the entire system. This research paper targets the reliability assessment of tantalum capacitor, to reduce e-waste and enhance its reusable capability.
Design/methodology/approach
The residual lifetime of a tantalum capacitor is estimated using the empirical method, i.e. military handbook MILHDBK2017F, and validated using an experimental approach, i.e. accelerated life testing (ALT). The various influencing acceleration factors are explored, and experiments are designed using Taguchi's approach. Empirical methods such as the military handbook is used for assessing the reliability of a tantalum capacitor, for ground and mobile applications.
Findings
After exploring the lifetime of a tantalum capacitor using empirical and experimental techniques, an error analysis is conducted, which shows the validity of empirical technique, with an accuracy of 95.21%.
Originality/value
The condition monitoring and health prognostics of tantalum capacitors, for ground and mobile applications, are explored using empirical and experimental techniques, which warns the user about its residual lifetime so that the faulty component can be replaced in time.
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Ioan Doroftei, Daniel Chirita, Ciprian Stamate, Stelian Cazan, Carlos Pascal and Adrian Burlacu
The mass electronics sector is one of the most critical sources of waste, in terms of volume and content with dangerous effects on the environment. The purpose of this study is to…
Abstract
Purpose
The mass electronics sector is one of the most critical sources of waste, in terms of volume and content with dangerous effects on the environment. The purpose of this study is to provide an automated and accurate dismantling system that can improve the outcome of recycling.
Design/methodology/approach
Following a short introduction, the paper details the implementation layout and highlights the advantages of using a custom architecture for the automated dismantling of printed circuit board waste.
Findings
Currently, the amount of electronic waste is impressive while manual dismantling is a very common and non-efficient approach. Designing an automatic procedure that can be replicated, is one of the tasks for efficient electronic waste recovery. This paper proposes an automated dismantling system for the advanced recovery of particular waste materials from computer and telecommunications equipment. The automated dismantling architecture is built using a robotic system, a custom device and an eye-to-hand configuration for a stereo vision system.
Originality/value
The proposed approach is innovative because of its custom device design. The custom device is built using a programmable screwdriver combined with an innovative rotary dismantling tool. The dismantling torque can be tuned empirically.
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Mohammed A. Alam, Michael H. Azarian, Michael Osterman and Michael Pecht
The purpose of this paper is to present an analytical approach to find the reduction in the required number of surface mount capacitors by the use of embedded capacitors in…
Abstract
Purpose
The purpose of this paper is to present an analytical approach to find the reduction in the required number of surface mount capacitors by the use of embedded capacitors in decoupling applications.
Design/methodology/approach
The analytical model used to perform decoupling is cavity model from theory of microstrip antenna and N‐port impedance matrix. The methodology involves addition of decoupling capacitors between the power and the ground plane such that the impedance between ports on the power‐ground plane becomes lower than the target impedance at that frequency. A case study is presented in which a 0.3 m×0.3 m power‐ground plane is decoupled by using various combinations of surface mount capacitors and embedded capacitors in the frequency range of 0.001‐1 GHz and at a target impedance of 0.1, 0.01, and 0.001 Ω. The total number of surface mount capacitors are compared in each case.
Findings
Use of embedded planar capacitors with a thin dielectric (about 8 mm) dampened board resonances at high frequency, as compared to a thick dielectric. Embedded capacitors are found to reduce the number of surface mount capacitors when the target impedance is low and the operating frequency is high.
Research limitations/implications
The methodology discusses in this paper is applicable to a simplified power‐ground plane (which has no cut‐outs and is rectangular in shape) as compared to actual digital circuits.
Originality/value
This methodology can be used as a quick preliminary tool to evaluate the decrease in the number of surface mount capacitors (by the use of embedded capacitors) as compared to complex and time consuming electromagnetic solvers.
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Bhanu Prakash Saripalli, Gagan Singh and Sonika Singh
Non-linear power–voltage characteristics of solar cell and frequently changing output due to variation in solar irradiance caused by movement of clouds are the major issues need…
Abstract
Purpose
Non-linear power–voltage characteristics of solar cell and frequently changing output due to variation in solar irradiance caused by movement of clouds are the major issues need to be considered in photovoltaic (PV) penetration to maintain the power quality of the grid. It is important for a PV module to always function at its maximum available power point to increase the efficiency and to maintain the grid stability. A possible solution to mitigate these generation fluctuations is the use of an electric double-layer capacitor or supercapacitor energy storage device, which is an efficient storage device for power smoothing applications. This study aims to propose a power smoothing control approach to smoothen out the output power variations of a solar PV system using a supercapacitor energy storage device.
Design/methodology/approach
To extract the maximum possible power from a PV panel, there are several maximum power points tracking (MPPT) algorithms developed in literature. Fuzzy logic controller-MPPT method is used in this work as it is a very efficient and popular technique which responds quickly under varying ecological conditions, reduced computational complexity and does not depend on any system constraints. Fuzzy logic-based MPPT controller by Boost DC–DC converter is developed for operating the PV panels at available maximum power point. Fuzzy logic-proportional integral (PI) charge controller is implemented by Buck–Boost converter to provide the constant current and suitable voltage for supercapacitor and to achieve better power smoothing. PI charge controller is preferred in this work as it offers better outcomes and is very easy to implement.
Findings
Simulation results conclude that the proposed power smoothing control approach can efficiently smooth out the power variations under variable irradiance and temperature situations. To confirm the accurateness of the proposed system, it is validated for poly-crystalline PV module and comparison of results is done by using different case study with and without the use of an energy storage system under change in irradiance condition. The proposed system is developed and examined on MATLAB/Simulink environment.
Originality/value
The performance comparison between PV power output with and without the use of a supercapacitor energy storage device under different Case Studies shows that the improved performance in smoothing of power output was achieved with the use of a supercapacitor energy storage device.
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