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1 – 10 of 51As electronic devices have become more complex and interconnection density has increased, electronics manufacturers are facing new challenges to solder SMD packages with pitches…
Abstract
As electronic devices have become more complex and interconnection density has increased, electronics manufacturers are facing new challenges to solder SMD packages with pitches down to 0.3 mm or less. To achieve positive results, all parameters throughout the soldering process have to be optimised. The first step on the SMT line is the application of solder paste. Any faults at this stage (material, equipment or process related) will be carried through the entire production line. Solder paste is one of the most important factors in the whole chain. It is important to understand the influence of the metal powders, activators, solvents and additives on soldering of ultra‐fine pitch SMDs. Special attention must be paid to the powder (fine pitch devices demand a fine grain in the solder paste). The reliability of the soldered joints is mainly dependent (apart from on the solder paste) on the solder quantities applied to the component pads, the tolerance regarding the shape and size of stencils + PCBs + SMDs, the accuracy of mounting and printing, and on the reflow profile. It is important to design the stencil apertures with sufficient surface area to provide enough surface tension (between the paste and the component pad) to pull the solder paste out of the stencil, while keeping the component pad small enough to match the lead of the component. As the wetting of fine pitch components is especially critical, it is necessary to pay more attention to the design of the reflow profile. It is recommended to solder ultra‐fine pitch components under nitrogen, as this enlarges the process window considerably.
SMT adhesives are applied to printed circuit boards by the following techniques: dispensing (c. 90% of all manufacturers use this technique at present), printing and pin transfer…
Abstract
SMT adhesives are applied to printed circuit boards by the following techniques: dispensing (c. 90% of all manufacturers use this technique at present), printing and pin transfer. The conventional dispensing method of applying adhesive utilises variations in dispense time, pressure and temperature combined with needle diameter to form deposits of varying volume and geometry. Recently, the printing technique has attracted a lot of interest. This technique is well known from solder paste printing. The major driving force is the higher throughput of this application method. moreover, a new printing technique with thick stencils allows the deposition of glue dots with different diameters and different heights. Two printing methods will be discussed: conventional printing technology and printing with thicker stencils.
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Abstract
Identifies the intermetallics formed in Sn‐0.5Cu‐3.5Ag and Sn‐3.5Ag‐0.5Cu‐0.5B (wt%) lead‐free solders, and the influence of boron on these precipitates. SEM, TEM and SIMS were employed to reveal the difference of microstructure in both solder alloys. It was found that the intermetallics formed were Ag3Sn and Cu6Sn5. Both solders were found to have a dispersion structure of Ag3Sn particles with network‐shaped subgrains. The microstructure of Ag3Sn was also found to become finer and more uniform in Sn‐3.5Ag‐0.5Cu‐0.5B solder, due to the addition of boron, while there was little effect from the boron on the Cu6Sn5 phase.
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Yong‐Won Lee, Keun‐Soo Kim and Katsuaki Suganuma
The purpose of this paper is to propose a solution procedure to minimize/eliminate voiding and spattering defects in the assembly of 0201 chip components with micro via‐in pads…
Abstract
Purpose
The purpose of this paper is to propose a solution procedure to minimize/eliminate voiding and spattering defects in the assembly of 0201 chip components with micro via‐in pads and 95 wt.%Sn‐5 wt.%Sb solder alloy.
Design/methodology/approach
In total, four different micro via‐in pad designs were compared (via‐hole opening size): ultra small via‐in pads (d: 10 μm), small via‐in pads (d: 20 μm), and large via‐in pads (d: 60 μm), as well as designs with no via‐in pads and capped via‐in pads. Two process variables were also evaluated for the goal of achieving a high‐yield assembly solution in micro via‐in pad and lead‐free solder systems. Potential factors, such as the preheat conditions of the reflow profile and stencil aperture size, which might affect voiding and spattering in solder joints with micro via‐in pad, were investigated. Solder voiding frequency and size were also determined from X‐ray inspection and sample cross‐section analysis.
Findings
The results indicated that larger via‐holes were seen to create bigger voiding than smaller via‐holes. For smaller via‐holes, spattering is a greater problem than voiding in solder joints. Ultra small via‐in pads generated higher spattering compared to no via‐in pads and capped via‐in pads. Capped via‐in pads exhibited the best results in preventing voiding and flux spattering, and provided a wide process window for the selection of process parameters. It is also indicated that spattering was found to rapidly reduced with both increasing stencil opening size and use of reflow profile with long‐preheat conditions.
Originality/value
The findings provide certain process guidelines for surface‐mount assembly with via‐in pad substrate design. The strategy is to prevent voiding and spattering by adopting capped via‐in pads, if possible, when applying micro via with the 95 wt.%Sn‐5 wt.%Sb solder alloy system.
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Barbara Dziurdzia, Maciej Sobolewski, Janusz Mikołajek and Sebastian Wroński
This paper aims to investigate voiding phenomena in solder joints under thermal pads of light-emitting diodes (LEDs) assembled in mass production environment by reflow soldering…
Abstract
Purpose
This paper aims to investigate voiding phenomena in solder joints under thermal pads of light-emitting diodes (LEDs) assembled in mass production environment by reflow soldering by using seven low-voiding lead-free solder pastes.
Design/methodology/approach
The solder pastes investigated are of SAC305 type, Innolot type or they are especially formulated by the manufacturers on the base of (SnAgCu) alloys with addition of some alloying elements such as Bi, In, Sb and Ti to provide low-void contents. The SnPb solder paste – OM5100 – was used as a benchmark. The solder paste coverage of LED solder pads was chosen as a measure of void contents in solder joints because of common usage of this parameter in industry practice.
Findings
It was found that the highest coverage and, related to it, the least void contents are in solder joints formed with the pastes LMPA-Q and REL61, which are characterized by the coverage of mean value 93.13% [standard deviation (SD) = 2.72%] and 92.93% (SD = 2.77%), respectively. The void diameters reach the mean value equal to 0.061 mm (SD = 0.044 mm) for LMPA-Q and 0.074 mm (SD = 0.052 mm) for REL61. The results are presented in the form of histograms, plot boxes and X-ray images. Some selected solder joints were observed with 3D computer tomography.
Originality/value
The statistical analyses are carried out on the basis of 2D X-ray images with using Origin software. They enable to compare features of various solder pastes recommended by manufacturers as low voiding. The results might be useful for solder paste manufacturers or electronic manufacturing services.
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Agata Skwarek, Balázs Illés, Krzysztof Witek, Tamás Hurtony, Jacek Tarasiuk, Sebastian Wronski and Beata Kinga Synkiewicz
This paper aims to investigate the quality and reliability of solder joints prepared from Pb-free alloys on direct bounded Cu (DBC) substrates. Two types of solder alloys were…
Abstract
Purpose
This paper aims to investigate the quality and reliability of solder joints prepared from Pb-free alloys on direct bounded Cu (DBC) substrates. Two types of solder alloys were studied: Sn90.95Ag3.8Cu0.7Sb1.4Ni0.15Bi3.0, with a high melting point of 225°C, and Sn42Bi58, with low a melting point of 138°C.
Design/methodology/approach
Capacitor components of size 1806 were soldered on DBC substrates by using convection reflow soldering and vacuum vapor-phase soldering technologies. A part of the samples was subjected to the thermal shock test. The structure of the solder joints and the content of the voids were investigated using three-dimensional X-ray tomography. The mechanical strength of the joints was evaluated using the shear force test, and the microstructure of the joints was studied on metallographic cross sections by using scanning electron microscopy.
Findings
It was found that the number of voids is not related directly to the mechanical strength of the solder joints. The mechanical strength of the solder joints depends more on the amount of Ag3Sn precipitation, Au precipitation and the intermetallic layer in the solder joints. In some cases, the thermal shock test caused micro-cracks around the Au precipitation because of a mismatch of Au, AuSn4 and Sn in terms of coefficients of thermal expansion.
Originality/value
DBC substrates are usually used for power electronics, where the quality of the solder joints is even more important than in the case of commercial electronics.
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Jianbiao Pan, Tzu‐Chien Chou, Jasbir Bath, Dennis Willie and Brian J. Toleno
The purpose of this paper is to investigate the effects of reflow time, reflow peak temperature, thermal shock and thermal aging on the intermetallic compound (IMC) thickness for…
Abstract
Purpose
The purpose of this paper is to investigate the effects of reflow time, reflow peak temperature, thermal shock and thermal aging on the intermetallic compound (IMC) thickness for Sn3.0Ag0.5Cu (SAC305) soldered joints.
Design/methodology/approach
A four‐factor factorial design with three replications is selected in the experiment. The input variables are the peak temperature, the duration of time above solder liquidus temperature (TAL), solder alloy and thermal shock. The peak temperature has three levels, 12, 22 and 32°C above solder liquidus temperatures (or 230, 240 and 250°C for SAC305 and 195, 205, and 215°C for SnPb). The TAL has two levels, 30 and 90 s. The thermally shocked test vehicles are subjected to air‐to‐air thermal shock conditioning from −40 to 125°C with 30 min dwell times (or 1 h/cycle) for 500 cycles. Samples both from the initial time zero and after thermal shock are cross‐sectioned. The IMC thickness is measured using scanning electron microscopy. Statistical analyses are conducted to compare the difference in IMC thickness growth between SAC305 solder joints and SnPb solder joints, and the difference in IMC thickness growth between after thermal shock and after thermal aging.
Findings
The IMC thickness increases with higher reflow peak temperature and longer time above liquidus. The IMC layer of SAC305 soldered joints is statistically significantly thicker than that of SnPb soldered joints when reflowed at comparable peak temperatures above liquidus and the same time above liquidus. Thermal conditioning leads to a smoother and thicker IMC layer. Thermal shock contributes to IMC growth merely through high‐temperature conditioning. The IMC thickness increases in SAC305 soldered joints after thermal shock or thermal aging are generally in agreement with prediction models such as that proposed by Hwang.
Research limitations/implications
It is still unknown which thickness of IMC layer could result in damage to the solder.
Practical implications
The IMC thickness of all samples is below 3 μm for both SnPb and SAC305 solder joints reflowed at the peak temperature ranging from 12 to 32°C above liquidus temperature and at times above liquidus ranging from 30 to 90 s. The IMC thickness is below 4 μm after subjecting to air‐to‐air thermal shock from −40 to 125°C with 30 min dwell time for 500 cycles or thermal aging at 125°C for 250 h.
Originality/value
The paper reports experimental results of IMC thickness at different thermal conditions. The application is useful for understanding the thickness growth of the IMC layer at various thermal conditions.
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Joon Kwon Moon, Y. Zhou and Jae Pil Jung
To investigate fluxless plasma ball bumping and effect of under bump metallization (UBM) thickness on joint properties using lead‐free solders.
Abstract
Purpose
To investigate fluxless plasma ball bumping and effect of under bump metallization (UBM) thickness on joint properties using lead‐free solders.
Design/methodology/approach
A fluxless soldering process was investigated in this study using Ar‐10 percent H2 plasma reflow. Balls made from two lead‐free solders (Sn‐3.5 weight percent Ag and Sn‐3.5 weight percent Ag‐0.7 weight percent Cu) were reflowed and, also Sn‐37 weight percent Pb as a reference. In particular, the effects of the UBM thickness on the interfacial metallurgical bonding and joint strength were studied. The UBM (Au/Cu/Ni/Al layers) thicknesses were 20 nm/0.3 μm/0.4 μm/0.4 μm and 20 nm/4 μm/4 μm/0.4 μm, respectively.
Findings
The experimental results showed that in the case of a thin UBM the shear strengths of the soldered joints were relatively low (about 19‐27 MPa) due to cracks observed along the bond interfaces. The thick UBM improved joint strength to 32‐42 MPa as the consumption of the Cu and Ni layers by reaction with the solder was reduced and hence the interfacial cracks were avoided. To provide a benchmark, reflow of the solders in air using flux was also carried out.
Originality/value
This paper provides information about the effect of UBM thickness on joint strength for plasma fluxless soldering to researchers and engineers.
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Girish S. Wable, Quyen Chu, Purushothaman Damodaran and Krishnaswami Srihari
Historically, tin‐lead solder has been a commonly used joining material in electronics manufacturing. Environmental and health concerns, due to the leaching of lead from landfills…
Abstract
Purpose
Historically, tin‐lead solder has been a commonly used joining material in electronics manufacturing. Environmental and health concerns, due to the leaching of lead from landfills into ground water, have necessitated legislation that restricts the use of lead in electronics. The transition from tin‐lead solder to a lead‐free solder composition is imminent. Several alternative solder alloys (and their fluxes) have been researched for electronics assembly in the last few years. The objective of this research was to develop a systematic selection process for choosing a “preferred” lead‐free solder paste, based on its print and reflow performance.
Design/methodology/approach
After a detailed study of industry preferences, published experimental data, and recommendations of various industrial consortia, a near eutectic tin‐silver‐copper (SAC) composition was selected as the preferred alloy for evaluation. Commercially available SAC solder pastes with a no‐clean chemistry were extensively investigated in a simulated manufacturing environment. A total of nine SAC pastes from seven manufacturers were evaluated in this investigation. A eutectic Sn/Pb solder paste was used as a baseline for comparison. While selecting the best lead‐free paste, it was noted that the selected paste has to perform as good as, if not better than, the current tin‐lead paste configuration used in electronics manufacturing for a particular application. The quality of the solder pastes was characterized by a series of analytical and assembly process tests consisting of, but not limited to, a printability test, a solder ball test, a slump test, and post reflow characteristics such as the tendency to form voids, self‐centring and wetting ability.
Findings
Each paste was evaluated for desirable and undesirable properties. The pastes were then scored relative to each other in each individual test. An aggregate of individual test scores determined the best paste.
Originality/value
This paper summarizes a systematic approach adopted to evaluate lead‐free solder pastes for extreme reflow profiles expected to be observed in reflow soldering lead‐free boards.
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Yaqi Zhang, Danfeng Geng, Jing Wang and Juhong Chen
The purpose of this study is to investigate how manufacturers make collaborative decisions in the ecosystem in the context of digital servitization.
Abstract
Purpose
The purpose of this study is to investigate how manufacturers make collaborative decisions in the ecosystem in the context of digital servitization.
Design/methodology/approach
Constructing an inframarginal analysis mathematical model to transform the ideal ecological niche choice of firms into solving the problem of maximizing the utility of firms, exploring the service boundary conditions of digital service business under the ideal ecological niche choice and focusing on the effects of niche factor, digital technology input and transaction efficiency on the boundary decision.
Findings
The boundaries of digital services business are in dynamic change, and changes are influenced by a combination of niche factor, digital technology input and transaction efficiency. Businesses focusing on a single niche and fully collaborative business delivery models are more in line with the trends under the digital service transformation.
Originality/value
Analyzing ecosystem participants’ cooperative decision-making on digital services from the perspective of ecological niche strategy selection. The study enriches the research on firm niche theory as well as service boundary decision theory in servitization transformation and provides theoretical guidance and management suggestions for firms to construct appropriate service boundaries to achieve synergistic and stable development of service ecosystems in the process of digital servitization transformation.
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