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Bumpless Cu/SiO₂ hybrid bonding, which this paper aims to, is a key technology of three-dimensional (3D) high-density integration to promote the integrated circuits industry’s continuous development, which achieves the stacks of chips vertically connected via through-silicon via. Surface-activated bonding (SAB) and thermal-compression bonding (TCB) are used, but both have some shortcomings. The SAB method is overdemanding in the bonding environment, and the TCB method requires a high temperature to remove copper oxide from surfaces, which increases the thermal budget and grossly damages the fine-pitch device.

In this review, methods to prevent and remove copper oxidation in the whole bonding process for a lower bonding temperature, such as wet treatment, plasma surface activation, nanotwinned copper and the metal passivation layer, are investigated.

The cooperative bonding method combining wet treatment and plasma activation shows outstanding technological superiority without the high cost and additional necessity of copper passivation in manufacture. Cu/SiO₂ hybrid bonding has great potential to effectively enhance the integration density in future 3D packaging for artificial intelligence, the internet of things and other high-density chips.

To achieve heterogeneous bonding at a lower temperature, the SAB method, chemical treatment and the plasma-assisted bonding method (based on TCB) are used, and surface-enhanced measurements such as nanotwinned copper and the metal passivation layer are also applied to prevent surface copper oxide.

This study aims to provide a flexible and cost-effective solution of 3D heterogeneous integration for applications such as micro-electro-mechanical system (MEMS) applications and smart sensor systems.

A novel 3D system-in-package (SiP) based on stacked silicon submount technology was successfully developed and well-demonstrated by the fabrication and assembly process of a selected smart lighting module.

The stacked module consists of multiple layers of silicon submounts which can be designed and fabricated in parallel. The bonding and interconnecting process is quite simple and does not require complicated equipment. The 3D stacking design offers higher silicon efficiency and miniaturized package form factor. The submount wafer can be assembled and tested at the wafer level, thus reducing the cost and improving the yield.

The embedding design presented in this paper is applicable for modules with limited number of passives. When it comes to cases with more passive devices, new process needs to be developed to achieve fast, inexpensive and reliable assembly.

The presented 3D SiP design is novel for applications such as smart lighting, Internet of Things, MEMS systems, etc.

The purpose of this paper is to demonstrate a novel 3D system-in-package (SiP) approach. This new packaging approach is based on stacked silicon submount technology. As demonstrators, a smart lighting module and a sensor systems were successfully developed by using the fabrication and assembly process described in this paper.

The stacked module consists of multiple layers of silicon submounts which can be designed and fabricated in parallel. The 3D stacking design offers higher silicon efficiency and miniaturized package form factor. This platform consists of silicon submount design and fabrication, module packaging, system assembling and testing and analyzing.

In this paper, a smart light emitting diode system and sensor system will be described based on stacked silicon submount and 3D SiP technology. The integrated smart lighting module meets the optical requirements of general lighting applications. The developed SiP design is also implemented into the miniaturization of particular matter sensors and gas sensor detection system.

SiP has great potential of integrating multiple components into a single compact package, which has potential implementation in intelligent applications.

This paper aims to realize the vertical interconnection in 3D radio frequency (RF) circuit by coaxial transitions with broad working bandwidth and small signal loss.

An advanced packaging method, 12-inch wafer-level through-mold-via (TMV) additive manufacturing, is used to fabricate a 3D resin-based coaxial transition with a continuous ground wall (named resin-coaxial transition). Designation and simulation are implemented to ensure the application universality and fabrication feasibility. The outer radius R of coaxial transition is optimized by designing and fabricating three samples.

The fabricated coaxial transition possesses an inner radius of 40 µm and a length of 200 µm. The optimized sample with an outer radius R of 155 µm exhibits S11 < –10 dB and S21 > –1.3 dB at 10–110 GHz and the smallest insertion loss (S21 = 0.83 dB at 77 GHz) among the samples. Moreover, the S21 of the samples increases at 58.4–90.1 GHz, indicating a broad and suitable working bandwidth.

The wafer-level TMV additive manufacturing method is applied to fabricate coaxial transitions for the first time. The fabricated resin-coaxial transitions show good performance up to the W-band. It may provide new strategies for novel designing and fabricating methods of RF transitions.

The purpose of this paper is to focus on through‐silicon via (TSV), with a new concept that every chip or interposer could have two surfaces with circuits. Emphasis is placed on the 3D IC integration, especially the interposer (both active and passive) technologies and their roadmaps. The origin of 3D integration is also briefly presented.

This design addresses the electronic packaging of 3D IC integration with a passive TSV interposer for high‐power, high‐performance, high pin‐count, ultra fine‐pitch, small real‐estate, and low‐cost applications. To achieve this, the design uses chip‐to‐chip interconnections through a passive TSV interposer in a 3D IC integration system‐in‐package (SiP) format with excellent thermal management.

A generic, low‐cost and thermal‐enhanced 3D IC integration SiP with a passive interposer has been proposed for high‐performance applications. Also, the origin of 3D integration and the overview and outlook of 3D Si integration and 3D IC integration have been presented and discussed. Some important results and recommendations are summarized: the TSV/redistribution layer (RDL)/integrated passive devices passive interposer, which supports the high‐power chips on top and low‐power chips at its bottom, is the gut and workhorse of the current 3D IC integration design; with the passive interposer, it is not necessary to “dig” holes on the active chips. In fact, try to avoid making TSVs in the active chips; the passive interposer provides flexible coupling for whatever chips are available and/or necessary, and enhances the functionality and possibly the routings (shorter); with the passive interposer, the TSV manufacturing cost is lower because the requirement of TSV manufacturing yield is too high (>99.99 percent) for the active chips to bear additional costs due to TSV manufacturing yield loss; with the passive interposer, wafer thinning and thin‐wafer handling costs (for the interposer) are lower because these are not needed for the active chips and thus adds no cost due to yield loss; with the current designs, all the chips are bare; the packaging cost for individual chips is eliminated; more than 90 percent of heat from the 3D IC integration SiP is dissipated from the backside of high‐power chips using a thermal interface material and heat spreader/sink; the appearance and footprint of current 3D IC integration SiP designs are very attractive to integrated device manufactures, original equipment manufactures, and electronics manufacturing services (EMS) because they are standard packages; and underfills between the copper‐filled TSV interposer and the high‐ and low‐power chips are recommended to reduce creep damage of the lead‐free microbump solder joints and prolong their lives.

The paper's findings will be very useful to the electronic industry.

This paper aims to present an overall framework of big data-based analytics to optimize the production performance of additive manufacturing (AM) process.

Four components, namely, big data application, big data sensing and acquisition, big data processing and storage, model establishing, data mining and process optimization were presented to comprise the framework. Key technologies including the big data acquisition and integration, big data mining and knowledge sharing mechanism were developed for the big data analytics for AM.

The presented framework was demonstrated by an application scenario from a company of three-dimensional printing solutions. The results show that the proposed framework benefited customers, manufacturers, environment and even all aspects of manufacturing phase.

This study only proposed a framework, and did not include the realization of the algorithm for data analysis, such as association, classification and clustering.

The proposed framework can be used to optimize the quality, energy consumption and production efficiency of the AM process.

This paper introduces the concept of big data in the field of AM. The proposed framework can be used to make better decisions based on the big data during manufacturing process.

Information models for the representation of product data are being developed as an international standard. However, the current application protocols focus on the representation of homogeneous objects only. This paper suggests an information model to represent heterogeneous objects using the information modeling methodology developed for ISO 10303. The data planning model is then extended to represent the two‐dimensional (2D) slice information using concepts from ISO 10303. The proposed formats are validated by physical realization of objects on two LM machines. This information model will help in providing a uniform base in the development of heterogeneous solid modeling systems. It will also equip the solid modeler with the ability to integrate with other applications and process planning in the domain of layered manufacturing.

The purpose of this paper is to compare four different additive manufacturing (AM) processes to assess their suitability in the context of upper extremity splinting.

This paper describes the design characteristics and subsequent fabrication of six different wrist splints using four different AM processes: laser sintering (LS), fused deposition modelling (FDM), stereolithography (SLA) and polyjet material jetting via Objet Connex. The suitability of each process was then compared against competing designs and processes from traditional splinting. The splints were created using a digital design workflow that combined recognised clinical best practice with design for AM principles.

Research concluded that, based on currently available technology, FDM was considered the least suitable AM process for upper extremity splinting. LS, SLA and material jetting show promise for future applications, but further research and development into AM processes, materials and splint design optimisation is required if the full potential is to be realised.

Unlike previous work that has applied AM processes to replicate traditional splint designs, the splints described are based on a digital design for AM workflow, incorporating novel features and physical properties not previously possible in clinical splinting. The benefits of AM for customised splint fabrication have been summarised. A range of AM processes have also been evaluated for splinting, exposing the limitations of existing technology, demonstrating novel and advantageous design features and opportunities for future research.

The purpose of this study is the comprehensive numerical assessment of multidirectional (1D/2D/3D) functionally graded composite panel structures with different material gradation patterns and degrees of material heterogeneity. Here, deformation characteristics are obtained under different loading and support conditions.

The finite element solutions of multidirectional functionally graded composite panels subjected to uniform and sinusoidal transverse loads are presented under different support conditions. Here, different functionally graded composites, such as unidirectional (1D) and multidirectional (2D/3D), are considered by distributing constituent materials in one, two and three directions, respectively, using single and multivariable power-law functions. A constitutive model with fully spatial-dependent elastic stiffness is developed, whereas the kinematics of the present structure is defined using equivalent single-layer higher-order theory. The weak form, based on the principle of virtual work, is established and solved consequently using isoparametric finite element approximations via quadrilateral Lagrangian elements.

The appropriate mesh-refinement process is carried out to achieve the mesh convergence; whereas, the correctness of proposed heterogeneous model is confirmed through a verification test. The comprehensive numerical assessment of multidirectional functionally graded panels under various loading and support conditions depicts the importance of degree of material heterogeneity with different gradation patterns and volume-fraction exponents.

A comprehensive analysis on the deformation behaviour of 1D-functionally graded materials (FGMs) (X-FGM, Y-FGM and Z-FGM), 2D-FGMs (XY-FGM, YZ-FGM and XZ-FGM) and 3D-FGM composite panels FGM structures is presented. Multifaceted heterogeneous FGMs are modelled by varying constituent materials in one, two and three directions, using power-law functions. The constitutive model of multi-directional FGM is developed using fully spatial-dependent elastic matrix and higher-order kinematics. Isoparametric 2D finite element formulation is adopted using quadrilateral Lagrangian elements to model 1D/2D/3D-FGM structures and to obtain their deflection responses under different loading and support conditions.

This paper gives a bibliographical review of the finite element and boundary element parallel processing techniques from the theoretical and application points of view. Topics include: theory – domain decomposition/partitioning, load balancing, parallel solvers/algorithms, parallel mesh generation, adaptive methods, and visualization/graphics; applications – structural mechanics problems, dynamic problems, material/geometrical non‐linear problems, contact problems, fracture mechanics, field problems, coupled problems, sensitivity and optimization, and other problems; hardware and software environments – hardware environments, programming techniques, and software development and presentations. The bibliography at the end of this paper contains 850 references to papers, conference proceedings and theses/dissertations dealing with presented subjects that were published between 1996 and 2002.