IPC and Soldertec

Soldering & Surface Mount Technology

ISSN: 0954-0911

Article publication date: 1 December 2004

Keywords

Citation

(2004), "IPC and Soldertec", Soldering & Surface Mount Technology, Vol. 16 No. 3. https://doi.org/10.1108/ssmt.2004.21916cac.002

Publisher

:

Emerald Group Publishing Limited

Copyright © 2004, Emerald Group Publishing Limited


IPC and Soldertec

IPC and Soldertec

Keywords: IPC, Lead-free, Electronics industry, Conferences

2nd International Conference on Lead Free Electronics, Amsterdam RAI, 22-23 June 2004 “For sn-pb, read sn-ph.d.”

The vast and magnificent red brick chateau that is Amsterdam Central railway station is a reminder of the days when style, creation and innovation were paramount. The vaulted ceilings of the wood-panelled rooms that once were the elegant waiting rooms for first-class passengers now look down on the scruffy T-shirted queues forming at the soulless and greasy fast food counters, from which obesity and litter are served with every portion. Hazards to health abound everywhere.

From here you can take a grubby little train to the RAI, the Congress Centre, where three days were being devoted to damage-limitation, not creation. A place where many highly educated people were addressing the problems blindly caused when it was decided that lead really ought to be banned, along with a few other anti-social metals such as mercury, cadmium etc. All too hazardous, people are obviously eating far too much of them.

So some 180 plus delegates came to the event so carefully planned by both IPC and Soldertec that formed their second annual conference devoted to the subject of lead-free.

Tuesday 22 June

Elegance reappeared in the shape of Kay Nimmo of Soldertec Global, who welcomed the delegates, and served an always necessary reminder that LF-Day was 1 July 2006, with China not far behind, and California uncharacteristically bringing up the rear with a date of 1 January 2007. She served two other parochial notices, the ELFNET meeting on Thursday, 24 June, and that the list for Nominations for the Soldertec Lead-Free Awards 2004 was now open.

Steve Andrews was the first speaker; Steve works with the DTI on their Technical Adaptation Committee, and provided an update on the implementation of RoHS.

He explained that the Technical Adaptation Committee comprises 25 member states, and has a responsibility for the maximum concentration values, exemptions etc. but have no mandate on scope and enforcement. It is the member states that decide on penalties and enforcement arrangements. Steve gave us some headings.

Scope This is 90 per cent clear, but 10 per cent of it comes as “grey areas”, where clarification is needed. That 10 per cent represents some 10,000 products, so the TAC hope to vote on criteria as guidance only, it is only the Courts that can give a definitive opinion.

Commissions Study The exception here is Deca-BDE, and a compliant VHDM connector system. They are also looking at lead as a coating material, and at lead in the solders of flipchips.

Producer What is a producer? A producer manufactures and sells own brand of products, or resells products under his own brand, or imports or exports into the EU. But “producers” will pass obligations onto their suppliers.

Put on to the market He mentioned Article 4.1 of the RoHS Directive, and asked – what does it all mean? The answer lies in the Blue Book, which defines that it is all to do with making a product available.

Non-compliance What are the penalties? Simply this, your goods are removed from the market.

He concluded by saying that there are some helpful books available from Envirowise, and he is also available on Steve.andrews@dti.gsi.gov.uk and other enquiries may be addressed to www.dti.gov.uk/sustainability.

Jabil Circuits sent along Mr. Quyen Chu who told us about the driving forces, the completing of the cradle to the grave cycle on soldering to meet environmental initiatives, the challenges including compliance to RoHS, materials consumption, and design for disassembly and recycling.

Supply Chain Management was one topic, including component compliance – are components lead-free process capable? What are the customer requirements? You need to have full disclosure on component construction materials, and component tracking.

Assembly of goods – is the component PCB process capable, will it withstand the temperatures? Assembly test – is it capable? Material process controls and verification are vital, and components should meet JEDEC specs as a minimum. Jabil have obviously done some good work on assembly process definition, they strongly recommend nitrogen reflow, and Mr Chu was able to provide a thoroughly detailed report on the results of their test programmes. They are running lead and lead-free side-by-side, leading ultimately to a single system.

As Mr. Chu said in his final comments – think “design for environment” and plan and prepare for implementation. An excellent presentation, that merely scratched the surface of a magnus opus at Jabil.

Dr. Jan Vanfleteren is from the IMEC/INTEC/TFCG consortium, and provided a project overview on IMECAT – Interconnection Materials for Environmentally Compatible Advanced Technology. There are nine partners in total, IM ECX, Heraeus, AMIS, TU Berlin, CR Fiat, Tecdis Iberica, Alcatel Bell, KSW Microtec, and Elcoteq of Finland. They are working on the development of lead-free interconnection materials, including solders and adhesives.

The development of the solder pastes has been done by Heraeus for wave and reflow soldering, looking at the materials and composition. They studied solder balling behaviour of two types of resins, and worked on the development of ICA and non-conductive adhesive (NCA) for flip-chips. They also studied test chip design and production for lead-free wafer bumping. Dr. Vanfleteren presented a highly detailed paper on the work done by the consortium, with FIAT looking after the automotive applications, and Alcatel the telecom aspects.

Current work includes lead-free wafer bumping technology, dedicated interconnection test chips, and some of the work that remains to be done is in basic lead-free assembly technologies in five industrial sectors, including: -

  • Ultrafine pitch (60 microns) lead-free wafer bumping.

  • The continuation of a comparative study of soldered vs adhesive flip-chip.

  • The qualification of developed technologies.

  • The design and manufacture and testing of demonstrators.

  • The continuation of modelling work, especially for demonstrators.

Much done, much more to do.

The development of lead-free solder in China was the title of a paper given by Hu Zhixin, of the evocatively named company Beijing Doublelink Great Wall Tinny Solder Co. Ltd.

Non-ferrous metals in China have formed the background to their economy, and foreign companies exploiting non-ferrous metals minerals in China have contributed hugely to the investments currently being made. From 13 February 2003 China began lead-free solder production, and their government has a 5-year plan, 863 programme, will enable the process to continue, with the Government seeing it as a priority.

Lead-free solders have been developed at Beijing, Tsing-Hua and Dalian Universities, by their research technical staff. Sn-Ag, Sn-Cu, Sn-Bi, Sn-Zn, Sn-IN, Sn-Ag-Cu, Sn-Ag-Bi are the ones being made, with Sn-Ag, Sn-Cu and SAC the most popular at present. Domestic consumption runs at 1000 tonnes per annum currently, but the market potential is enormous. From 14 May 2004 they have targeted a replacement for Sn-Pb, and now the situation in China is that demand will exceed supply, also the availability of suitable fluxes will be limited.

In summing up, Mr. Zhixin said that there would be full RoHS in force in China in about two months time.

Dr. Denis Barbini is from Vitronics Soltec, and he knows a thing or two about lead-free wave and selective soldering. He showed us the road map that needs to be followed, where alloy selection appears to be geographically dependent. Europe 33 per cent SAC, in China it is 49 per cent SAC but you need to consider the volumes pertaining to each region. He looked at the impact of temperature on soldering and joint quality, 260°C seemed to be the best for wave process soldering. Failure analysis consisted of pull tests and thermal cycling. 145°C was a good preheat temperature, with dwell time a function of conveyor speed. Most solder balls were observed below the threshold of IPC 610C, and the formation of solder balls is dominated by preheat temperature and dwell time. There was little dependence upon board finish or alloy. Nitrogen emphatically helps with wetting in reflow. Microcracking had been noted in various forms, but their work had narrowed down the cause. A detailed and informative presentation.

Dr. Katsuaki Suganuma hails from Osaka University where he has been studying the influence of lead contamination on the reliability of lead-free soldered joints. In a graphic presentation he covered a wide range of factors on Pb contamination, including solidification effects – lift-off in reflow – thermal cycle, the effects of exposure to heat and humidity. It seems that you can enhance the defect formation by expanding the pasty range. Cracking increases as a proportion of thermocycling. He talked about the influence of corrosion, and heat exposure on peel strength, and of appearance.

Dr. Hector Steen of Henkel came on after lunch in Session 3 and gave a fascinating presentation on the development of a fine particle solder paste for micron pitch lead-free soldering. He started by listing the drivers for lead-free alternatives, the EU legislation, and environmental issues. His company was aware that ultra fine pitch smaller joint structures 0.05 mm (2 thou), would be controlling solder deposit volumes over high i/o. Could you reflow small paste deposit volumes? Remember that printing accounts for more than 50 per cent of SMT assembly defects.

As it is the case that solder pastes require fine particles, there were two types that were discussed. Type 6 (15-5 um) and Type 7 (12-2 um) particle size. Henkel had focused on sub-processing – paste roll, paste transfer, paste design and formulation. They looked at stencil design and fabrication quality, and the printing parameters.

It was evident that electroformed and laser patterned stencils were no longer adequate, they had moved onto micro-engineered stencil technology, with apertures formed with micron tolerance. They gave a much better platform on which Henkel could assess the different types of paste. They got no paste bridging, no aperture skipping, no paste smearing, sufficient paste roll, and acceptable cleaning of paste from stencil surface. Type 6 printed a full array pattern down to 90 microns pitch. With Type 7 you could print the full array pattern, 16 microns pitch, 30 microns. Type 7 avoids problems with bleeding. But Type 6 had better release.

Concerning reflow, a nitrogen atmosphere is vital. Lead-free alloys have a higher melting temperature, as we all know by now. The new solder pastes will have a shorter shelf life, 1-2 months only, but ultra fine pitch is OK with Type 6 and Type 7. He thanked Microstencil Ltd, at Heriot-Watt University UK, Celestica at Kidsgrove and the University of Greenwich, School of Engineering for their partnership in the project.

23 Wednesday June

Two further sessions on the second day, 12 presentations in each. Difficult to choose which one to sit in on as they ran concurrently. We took a pencil and ringed some of them.

Dr. Jeremy Pearce from Soldertec Global told us all about Electronics Lead Free Network (ELFNET). This is a new EU funded organisation that supports EU policy, with an aim “to co-ordinate, integrate and optimise the critical mass of European research in lead-free soldering, providing pan-European support for the implementation of the RoHS Directive”.

ELFNET took 4 years to get underway, following early alarms in the industry on inaction. Once they started, they discovered a huge fragmentation in the research field, with all manner of unknown and outdated projects going on all over the place. Aware that Japan was already well advanced, and that the US were pouring millions of dollarS into lead-free research, the EU agreed to support the organisation to the tune of 23 million euros. This works out at 230 persons/month for three years. Dr. Pearce outlined the structure, comprising one main committee with three sub-committees, these being National Networks, (ITRI in the UK), The Technical Experts Group, and the Industry Networks, bolstered by Philips, Siemens, Bosch and Alcatel to cover the main industry disciplines.

We will be hearing a lot more about ELFNET in the months to come.

Ed Kelley is a BSc working for Cookson Electronics who came to tell us all about the impact of Pb-free assembly on PCB base materials. His company is Polyclad and base materials are what they make. The differences, he explained, with lead-free assembly is that peak assembly temperatures range from 230-235, up to 260°C, there are additional rework cycles, and additional assembly cycles that can result in barrel cracking or compromised long-term reliability.

There are some common misconceptions – “switch to higher Tg”. There are many others. So what is the worst that can happen? Ed showed us some examples of delamination, give a board 260°C for 2 min and hey presto, all went pear-shaped. Never seen the like, we agreed. Other problems include through hole reliability, Z-axis expansion, resin decomposition, glass transition and resin content.

Thermal robustness is the name of the game. It is not just enough to specify higher Tg values; you have to consider decomposition temperature. This is the temperature at which a 5 per cent weight loss occurs by thermal gravimetric analysis, and the point at which this happens is critical. Ed showed us a detailed comparison of four laminates evaluated under IPC TM 650. Rounding off through a sea of data, Ed summarised that whilst Polyclad is still working at it, a laminate with HTHD looks like the best bet. But, like the weather, nothing is for certain.

Environmentally Friendly Soldering Technology (EFSOT) was represented by the energetic and enthusiastic Otmar Deubzer from the Technical University of Berlin. He explained about the work of EFSOT.

It would appear that 90,000 tonnes of solder are used globally, of which 70 per cent is for wave soldering, 8 per cent is in solder pastes, and rest in various places. Hitherto only 5 per cent in the world is lead-free, and of that SAC is now 59 per cent, SnAg is 9 per cent, SnCu is 20 per cent and the rest is a bag of all sorts. What happens at end of life? Well, 60 per cent can be recycled. So far total recovery is Sn 14 per cent, Ag 20 per cent, Bi 17 per cent, and Pb 16 per cent. Lead substitutes probably offer no major risk to supplies, overall, but EFSOT are undertaking further research on resource evaluation.

Mr. Masahide Okamoto came all the way from Hitachi in Japan, to give us the review of the IMS project EFSOT Japan 2003 that is studying the environmental impact of lead-free soldering. They have 26 partners, located in Korea, Japan and Europe. Within EFSOT are several working parties (WPs) and of these WP2 is looking at the biological impact, scrutinising the toxicity of the constituent metals in lead-free solders.

There was a nice little bit in his presentation about illegal dumping (Heaven forfend) where lead-free products are much better if the level exceeds two per cent. Below that it is better to dump old-fashioned tin-lead! The solution? Build better recycling plants, says Mr. Okamoto, and he is quite right. The situation in the UK is already dire, but we cannot comment on the rest of Europe. On a more cheerful note, he added that the crystallisation and removal of copper rich intermetallic compounds C6SN5 from the solder bath of wave soldering could reduce the amount of lead-free solder scrap by one-third.

Jack Fellman of Rohm & Haas Electronic Materials (RHEM) (formerly Shipley) brought to us his experiences with the lead-free HASL process. RHEM have worked with two major HASL machine manufacturers on a detailed study of the behaviour of lead-free solders in this process. Jack gave us a wealth of detail, which may be seen in full in Circuit World Issue 31 Volume 1 to be published in September. In a factual presentation, he concluded by saying that commercially acceptable lead-free solder deposits were produced by three different HASL machines, on a very challenging test vehicle. Cleanliness, as determined by SIR and IC, met IPC specifications for solder mask, and LPI solder masks met all expectations in the tests. High temperature fluxes and oils used with lead-free solder were also tested and found to be acceptable for each application, be that vertical or horizontal.

Greg Heaslip is writing his thesis on drop testing for solder joint failure at the Stokes Research Institute in the University of Limerick. That is in Ireland. Drop testing is important, as 50 per cent of failures in mobile phones are due to the “phones being dropped, and not always onto something soft. Greg said that he was working towards a stress-life model. Strain profiles. Showed the test vehicle, which was 2-sided FR4 with four BGA patterns, and100 solder balls on each. There were four aspects to the work – life tests, strain tests, resistance tests and some failure analysis. Solders were SAC and Sn63Pb37.

There were two types of failure, a Soft failure is when the daisy chain resistance exceeded the threshold, and a Hard failure was when it did that and did not return. Drop test failures tended to be confined to the crack between the solder ball and the PCB interface, not the component interface. Tests had indicated that there were more failures with lead-free solder than with tin-lead, than with tin-lead, and it was interesting to note that the figure of 92.5 per cent failure at component interface with lead-free, against 92.5 per cent failure at the PCB interface with tin-lead solder. PCB surface finish had been OSP.

Getting his PhD should now be a mere formality after this.

Keith Bryant of DAGE then came to wrap up for the afternoon, Does PCB pad finish affect voiding levels in lead-free assemblies? Yes.

Lead-free can increase voiding because of

  • aggressive flux chemistries;

  • increased alloy melting temperatures;

  • faster temperature rises; and

  • faster cool down rates.

Is voiding good or bad?

  • voids can act as stress relievers for cracks;

  • voids can help thermal mismatch;

  • any voiding on the bond line is bad;

  • some voids can be good; and

  • some voids can be bad.

You get the picture? Keith said that they had compared OSP, immersion tin, immersion silver, ENIG, and HASL. Measurements had been carried out on a Dage fully digital X-ray system, showing, 65,000 levels of greyscale, with a resolution of 1.3 m pixel on screen, and utilising the systems unique oblique viewing angle.

Immersion tin and HASL had exhibited the lowest levels of voiding; OSP had the highest level of voiding. OSP and ENIG tended to produce the largest voids. Tin, silver and HASL produce the smallest voids. However, all of them showed under 10 per cent, whereas JEDEC allows up to 30 per cent. Voids have been around for a long time, and will remain with us for the foreseeable future.

However, went on Keith with a grave expression, they had noted with some concern a potential failure mechanism. Given the “bubble” effect indicated, it is called “Champagne Voiding”. It is proven to cause opens after burn in, and is not easy to locate even with X-ray. It has been seen on ENIG, silver, and OSP boards, on large high I/o PBGA’s, and on ceramic parts and flip-chips. But not on immersion tin. An enigmatic problem, so far no pattern has emerged, but the SMART Group have some experience, all of their results would be useful to obtain.

So, something else to worry about.

Summary

A review in these pages of all 36 papers presented at the IPC-Soldertec Conference is impractical, however one might wish to include them. Hopefully those mentioned above will provide a flavour of the content, and my apologies go to those who have been omitted. A blindfold and a pin tend to be an aid to impartial selection.

It was heartening to note that many of the papers addressing various aspects of “lead-free” gave a clear indication that the work being done to remove a problem, and to establish suitable alternatives, had often resulted in an overall technical advance being made.

IPC and Soldertec are to be congratulated for having arranged another superb event. This one was run over three days, combining one technical course, four practical workshops, 36 technical papers in four separate sessions, and six scene-setting papers in the plenary session. An event of huge importance to the understanding of what lead-free is, what it means, what the implications are, what work is yet to be done, and an appreciation of the expenditure of an enormous wealth of human talent in resolving the problem. The industry definitely needs a third conference, the demand is there, and 1 July 2006 is none too distant.

John Ling