Altera and TSMC jointly develop world’s first heterogeneous 3-D IC test vehicle using CoWoS process

Citation

(2012), "Altera and TSMC jointly develop world’s first heterogeneous 3-D IC test vehicle using CoWoS process", Microelectronics International, Vol. 29 No. 3. https://doi.org/10.1108/mi.2012.21829cab.016

Altera and TSMC jointly develop world’s first heterogeneous 3-D IC test vehicle using CoWoS process

Article Type: New products From: Microelectronics International, Volume 29, Issue 3

Altera Corporation has announced the joint development of the world’s first heterogeneous 3-D IC test vehicle using TSMC’s chip-on-wafer-on-substrate (CoWoS) integration process. Heterogeneous 3-D ICs are one of the innovations enabling the industry’s move beyond Moore’s law by stacking various technologies within a single device, including analog, logic and memory. TSMC’s integrated CoWoS process provides semiconductor companies developing 3-D ICs an end-to-end solution that includes the front-end manufacturing process as well as back-end assembly and test solutions.

Altera is the first semiconductor company to develop and complete characterization of a heterogeneous test vehicle using TSMC’s CoWoS process. This and additional test vehicles enable Altera to quickly test the capabilities and reliability of 3-D ICs to ensure they meet yield and performance targets. TSMC’s CoWoS process combined with Altera’s technology leadership in silicon and IP lays the foundation for rapid and cost-effective 3-D IC product development and deployment in the future.

Altera’s vision for heterogeneous 3-D ICs includes developing device derivatives that allow customers to mix and match silicon IP based on their application requirements. Altera will leverage its leadership position in FPGA technology and integrate various technologies with an FPGA, including CPUs, ASICs, ASSPs, memory and optics. Altera’s 3-D ICs enable customers to differentiate their applications by leveraging the flexibility of the FPGA, while maximizing system performance, minimizing system power and reducing form factor and system cost.

CoWoS is an integrated process technology that attaches device silicon chips to a wafer through a chip-on-wafer (CoW) bonding process. The CoW chip is attached to the substrate (CoW-On-Substrate) to form the final component. By attaching the device silicon to the original thick wafer silicon before it finishes the fabrication process, manufacturing-induced warping is avoided. TSMC plans to offer CoWoS as a turnkey manufacturing service.

For more information, visit: www.tsmc.com