(2012), "Cadence and GLOBALFOUNDRIES significantly speed design for manufacturing signoff at 32, 28 nanometers", Microelectronics International, Vol. 29 No. 1. https://doi.org/10.1108/mi.2012.21829aaa.012Download as .RIS
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Copyright © 2012, Emerald Group Publishing Limited
Cadence and GLOBALFOUNDRIES significantly speed design for manufacturing signoff at 32, 28 nanometers
Article Type: Industry news From: Microelectronics International, Volume 29, Issue 1
Cadence Design Systems, Inc. has teamed with GLOBALFOUNDRIES to dramatically reduce the turnaround time for DFM signoff at 28 nanometers. The companies’ advanced technologies enable customers to find and fix potential lithography hotspot problems that could reduce yield or even threaten viability of complex chip designs headed for manufacturing. Using the proven Cadence “in-design” DFM technology to support the GLOBALFOUNDRIES DRC+ methodology, Rambus cited a 60 times speedup of DFM signoff.
Many of the world’s leading technology companies, including Rambus, have successfully applied the in-design DRC+ flow using the silicon-validated 28-nanometer pattern library from GLOBALFOUNDRIES. The core of the DRC+ flow is the two-dimensional shape-based pattern matching, which offers significant speed improvements in error detection and fixing.
The Cadence Pattern Search and Matching Analysis are embedded in Cadence Litho Physical Analyzer, Cadence Physical Verification System and the unified Cadence Virtuoso® custom/analog and Encounter® Digital Implementation System solutions. This offers designers the flexibility to leverage the in-design pattern matching and automatic fixing available in Encounter and Virtuoso, which correlates 100 percent with the signoff flow and has successfully been used on advanced node production chips.
For more information, please visit the web site: www.cadence.com