Achronix and Mentor Graphics provide state-of-the-art physical synthesis support for Speedster22i FPGAs

Microelectronics International

ISSN: 1356-5362

Article publication date: 2 August 2011



(2011), "Achronix and Mentor Graphics provide state-of-the-art physical synthesis support for Speedster22i FPGAs", Microelectronics International, Vol. 28 No. 3.



Emerald Group Publishing Limited

Copyright © 2011, Emerald Group Publishing Limited

Achronix and Mentor Graphics provide state-of-the-art physical synthesis support for Speedster22i FPGAs

Article Type: New products From: Microelectronics International, Volume 28, Issue 3

Achronix Semiconductor Corporation today announced the closing of a formal agreement with Mentor Graphics Corporation (NASDAQ: MENT) to provide advanced synthesis support for Achronix Semiconductor’s Speedster22i field programmable gate arrays (FPGAs). Based on Intel’s 22-nm process technology, Achronix Speedster22i shatters the limitations of current FPGAs by offering cost-effective production of high-performance, high-density, IP-rich FPGAs. In addition to providing logic synthesis for the 22-nm Speedster22i FPGA platform, Mentor Graphics Precision Advanced RTL Achronix Edition includes state-of-the-art physical synthesis to quickly implement complex designs with superior quality of results.

Mentor is the first EDA provider to offer physical synthesis support for Speedster22i devices. Working in conjunction with the fourth generation Achronix CAD Environment (ACE 4.0) tool set, the push-button physical synthesis capability provides mixed language (VHDL and Verilog) as well as SystemVerilog support. Automatic incremental synthesis further reduces the design cycle time, yielding time-to-market advantages for design teams.

Designers with applications demanding the highest levels of assurance and reliability will now be able to take full advantage of the “assured synthesis mode” and “safer finite state machine” (FSM) capabilities that Precision Advanced RTL Achronix Edition provides when targeting the Speedster22i devices. The safer FSM mode automatically infers a fault tolerant implementation, where a single event upset will not interrupt FSM operation. The “assured synthesis mode”, available in Precision Advanced RTL Achronix Edition for Speedster22i devices, ensures the synthesized design can be formally verified as is commonly required in safety compliance standards (e.g. DO-254).

“We work closely with the team at Achronix to ensure fully-optimized physical synthesis support for their recently announced 22 nm FPGAs,” said Daniel Platzker, FPGA synthesis product line director at Mentor. “The combination of Achronix FPGAs and their access to Intel’s 22 nm process technology was a compelling reason to partner with Achronix.”

“Although we are breaking new ground in FPGA performance, density, cost, and features with our Speedster22i family, we are excited to continue to support traditional design methodologies and familiar tools for Speedster22i,” said Yousef Khalilollahi, Vice President of Marketing at Achronix Semiconductor. “This agreement with Mentor arms designers of the world’s most advanced FPGAs with state-of-the-art tools.”

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