The 5th Annual IeMRC Conference,Holywell Park Conference Centre,Loughborough University, 21 September 2010

Citation

Ling, J. (2011), "The 5th Annual IeMRC Conference,Holywell Park Conference Centre,Loughborough University, 21 September 2010", Microelectronics International, Vol. 28 No. 1. https://doi.org/10.1108/mi.2011.21828aac.002

The 5th Annual IeMRC Conference,Holywell Park Conference Centre,Loughborough University, 21 September 2010

Article Type: Conferences and exhibitions From: Microelectronics International, Volume 28, Issue 1

The conference began with a welcome to the many delegates by Professor Martin Goosey, IeMRC Industrial Director, He bought the delegates up to speed with the latest news from the Research Centre; further funding is in place for the next five years, some £9 million, and thus they are able to support two flagship and 11 standard projects, which are now getting underway.

Dr David Pedder of David Pedder Associates spoke on the role of flip chip bonding in advanced packaging, where a device bonds with pads face down to a chip carrier. It all began in the 1960s at IBM, who developed solid logic technology, and this now exceeds 2,100 bonds per chip. Flip chips offer improved high frequency and speed performance with a minimal component footprint. Bonding can be by solder, or adhesive, or solid phase; solder is used for CoB, CiP and System In Package (SiP) applications and has a major advantage in that it is self-aligning. David explained about the design parameters required when solder is used, and how solder bumping works, and the need for underfill, to improve reliability. Adhesive flip chip bonding is important, and is used in volume production in the display sector, and has the advantage of fine pitch along with low temperatures, with a non-conductive adhesive film. Solid phase flip chip bonding is used for FCOB, as one example.

Flip chip applications include discrete devices, with both high and low I/O count, in RFIDs, with gallium arsenide devices, on integrated passive devices, SiPs, etc. Flip chip is now approaching 10 per cent of all device interconnection, especially with 3-D integration where it can reduce the overall height of the package by 50 per cent. In photonic devices, flip chip is a popular interconnect technique, also in the realm of IR sensor devices. Flip chip trends include a wider uptake, copper pillar bumping, finer pitch and chip-to-chip bonding, and growth will be driven by high I/O applications, and 3-D integration.

Norman Stockham from TWI spoke about packaging technology for high temperature applications which range from 200 to 400°C and increasingly 400 to 800°C where sensors may be used. The environments are harsh as well, with high humidity, and other adverse properties. Silicon works well up to 300°C, but after that it has to be gallium arsenide, which leads on to silicon carbide and diamond for higher temperature tolerance. Jointing technology includes solder, which has many advantages, and works well at a range of temperatures, with a range of alloys, but above 300°C the word brazing comes into play.

Adhesive chip attach is low cost, can be thermoset or thermoplastic, but works not at all well above 250°C. Eutectic die attach is one which takes the higher temperatures, it has high thermal conductivity, but the interface is pretty rigid, so here the need is for liquid phase joining. Here carbon nanotubes are used as an interface and give high thermal conductivity, 100-3,000 W/mK.

Alternative processes include conductive adhesives, mechanical bonding, direct./write/printing, and laser and resistance welding.

One of the IeMRC’s flagship projects is Smart Microsystems, as described by Anthony Walton of the University of Edinburgh. This is a fully integrated project with Heriot-Watt University. The IC industry is changing; it is getting expensive to build a new fab, and costs billions to set up. So, older technologies are hanging on, which brings up a question – is there a market for older technology, and can we take state-of-the-art technology and do something clever with it? Will carbon nanotubes replace silicon?

MEMs on CMOS are a potential technology along with many others, such as liquid crystal, and the thinking is that we could put sensors or actuators on MEMS, and there are number options here – CMOS first, then MEMS second, or the other way around or maybe a fully integrated CMOS/MEMS process. Or etch release to fabricate MEMS. Professor Walton went on to describe liquid crystal on CMOS, for displays, which gives a good mirror surface and the process technology has been moved to a foundry for production, and is freely available. The formation of an OLED microdisplay on a CMOS wafer was described, and a detector called SCUBA, used on space mirrors. These incorporate indium bump bonds with a nitride membrane, which leads to the silicon having a brick etch to give waffle walls, all of which apparently delighted astronomers with the Orion scan project.

He described a drug delivery capsule, where a cell was activated releasing a measured dose of a medical drug within a patient. Smart Microsystems have a wide application. There are three stages – the marriage of electronics, the integration of materials and processes, and the integration with current design. No less than seven multinational companies are involved here, along with two trade organisations, and the vision is to bring value to our industrial partners, whereby we establish a consortium as a world leader in this type of technology.

Work packages include magnetic materials and their integration on CMOS, silicon-carbide IC technology, printing technologies and 3-D integration, powder blasting vias, novel micro fluidic sensing and actuation, as well as surface acoustic wave technology; and the integration of sensors with IC technology. Keeping it in the family seemed to be one of the more attractive aspects of the post-processing aspects, and it makes the UK highly competitive in a world market.

Professor Sudipta Roy from the University of Oxford described a process being developed in Newcastle for electrochemical microfabrication without photolithography, entitled EnFACE. This incorporates a specialised electrochemical reactor for pattern transfer, using a metallic material with a resist pattern, which serves as an electrochemical tool. The substrate, which is fully exposed, is placed facing the tool at close proximity and electrically connected such that the tool is the cathode and the substrate the anode. An electrolyte is pumped through the system and she showed how she had been able to deposit a resist thickness of 7 microns, and by using different current waveforms she could obtain different structures. The process has added benefits of low material and energy consumption.

Professor Marc Desmuillez of Heriot-Watt University spoke about frequency agile microwave oven bonding system (FAMOBS), the FAMOBS, an IeMRC project which has subsequently attracted European project funding and is interestingly close to the system integration phase, with collaborators at Greenwich University and the Fraunhofer Institute in Germany. This started in the UK, but has now moved on to become a European project with a more industrial setting. Marc described microwave heating, what is involved, and the limitations of existing equipment. His system is unique in that it controls the radiation (variable frequency microwaves) which can be applied where and when you want it. Microwave curing is ten times faster than conventional curing and has an immediate application for SMT pick and place machines; he mentioned others such as petroleum compound extraction. He was at pains to describe the far from straightforward route that led them to the open ended oven with a pyrometer built in that gives a much better temperature profile and degree of cure, and results thus far have been most successful.

Dr Hazel Assender from the University of Oxford introduced the other big IeMRC flagship project which was on roll-to-roll vacuum processed carbon based electronics. This started in June so is just getting going with four universities, Leeds, Birmingham, Manchester and Oxford. This is aimed at cheap processing of materials for printed electronics. It offers mechanical flexibility, low density, low environmental impact, and simple devices at low cost. Web speeds of 300 m/m are possible.

Consideration include: the use of materials which are cheap and available; no high temperature processing; rough surfaces are inherent in polymer films, which stretch during winding, so patterning is a problem, and polymers “outgas”; brittle layers may crack or abrade during winding and there is an effect of underlying layers on multi-layer printing. She also explained the pros and cons of solvent based patterning versus vacuum patterning.

There is a huge market for the various applications which include tagging for packaging – for brand protection, anti-counterfeiting, product tracking, including sensors (RFID) and displays.

They are using molecular materials, organic semiconductors and organic dielectrics, the latter being applied by a flash evaporation process, and this has to be pin-hole free over a large area. Circuit design defines the manufacturing priorities, and minimises the number of transistors. Circuit layout is based on MD stripes with ±100-micron registration, and 2-D patterning, with smaller features. They also want to use existing technologies, such as inkjet printing, laser ablation, flexo printing and contact masks there are all to be assessed.

Key technology hurdles include patterning and registration; reproducibility and reliability, and curing is “a bit of a problem”.

But they can make transistors on an R2R system, and have a yield in excess of 90 per cent using a solvent-less high speed process.

Dr Steve Jones gave us his review of Digital Printed Electronics. Printed electronics must have form and function and be fit for the purpose for which it is designed. He explained that his company, Printed Electronics Limited (PEL), is a process development company, and he compared the various printing processes, and what they can achieve. But it is with inkjet that they focus on for the most part in the forming of an interconnect. Inkjet printing can create a circuit on almost any substrate and, by using a five-head machine, they can print in colour, an array as he called it. They can print using carbon black, copper, silver, palladium and gold as well. Dielectric inks are also important. The curing of the conductive inks is known as sintering. Key considerations include cost benefits, robustness of process and suitability for process. A fully additive process and inkjet can do things that others processes cannot. It adds value to packaging. They have systems up and running and in commercial production, and offer “InkTronics” courses at their Cambridge headquarters for those who wish to be introduced to what PEL can offer.

From the University of Surrey came Peter Wilson who, in an extremely detailed paper, described the work being done on inkjet printing and spin-coating of electrically conductive polymers – they have successfully obtained resolutions down to 200 μm on a roll-to-roll printing machine running at 300 m/m, producing organic electronics that can be used in the drug industry, on conductive polymers, such as PEDOT: PSS, with and without surfactant. Resistivity is down to 10 Ω/sq. With ink jet printing under liquid nitrogen, they had found that even lower conductivity was possible.

The concluding paper of the day was from Matt Ball who spoke about the work being done by the Engineering and Physical Sciences Research Council (EPSRC), their manufacturing strategy, and their work as the main link with the IeMRC. EPSRC is the primary source of funding for research in physical sciences, and have a budget of £8 million per annum, for work ranging from civil engineering to ITT. They have a strong industrial engagement, and have leveraged some additional £700 million through collaboration with business. It was interesting to learn that 30 per cent of GDP is dependent on engineering and the sciences, which account 88 per cent of our exports.

It is science and engineering that drives the global economy, and it is science and engineering that are key to tackling societal issues such as energy security, climate change, the ageing population and crime.

In the next spending period, they will be building on existing strategies, creating new centres for innovative manufacturing, like IeMRC, promoting business inspired upstream research, advanced technology skills, and with some new approaches such as sustainable manufacturing, frontier manufacturing research and leadership therein and access to global economies.

Professor Paul Conway brought the day to a close by looking at the past year and looking forward to the future. IeMRC have had their call for proposals, and impact statements, and have been busy – in 2010 they received 20 outline proposals, of which six were invited to submit more detailed submissions. They have established a college for peer review, who have been most helpful, they review all proposals, and it enables the IeMRC to see how effective the work is that they do is. By the end of the year, they will have delivered no less than ten economic impact case studies, and are planning the next Doctoral Training Award competition for next year, and the Technology Strategy Board competition next October. Happily the EU Framework Programme is increasing its budget year on year by 2 per cent. He thanked everyone for coming, and looked forward to seeing everyone again next year. He will.

John LingAssociate Editor