Citation
(2008), "Intel, Samsung Electronics, TSMC reach agreement for 450 mm wafer manufacturing transition", Microelectronics International, Vol. 25 No. 3. https://doi.org/10.1108/mi.2008.21825cab.003
Publisher
:Emerald Group Publishing Limited
Copyright © 2008, Emerald Group Publishing Limited
Intel, Samsung Electronics, TSMC reach agreement for 450 mm wafer manufacturing transition
Article Type: Industry news From: Microelectronics International, Volume 25, Issue 3
Intel Corporation, Samsung Electronics, and TSMC have reached agreement on the need for industry-wide collaboration to target a transition to larger, 450 mm-sized wafers starting in 2012. The transition to larger wafers will enable continued growth of the semiconductor industry and helps maintain a reasonable cost structure for future integrated circuit manufacturing and applications.
The companies will cooperate with the semiconductor industry to help ensure that all of the required components, infrastructure and capability are developed and tested for a pilot line by this target date.
Historically, manufacturing with larger wafers helps increase the ability to produce semiconductors at a lower cost. The total silicon surface area of a 450 mm wafer and the number of printed die (individual computer chips, for example) is more than twice that of a 300 mm wafer. The bigger wafers help lower the production cost per chip. Additionally, through more efficient use of energy, wafer and other resources, bigger wafers can help diminish overall use of resources per chip. For example, the conversion from 200 to 300 mm wafers helped reduce aggregate emissions per chip of air pollution, global warming gasses and water, and further reduction is expected with a transition to 450 mm wafers.
“There is a long history of innovation and problem solving in our industry that has delivered wafer transitions resulting in lower costs per area of silicon processed and overall industry growth.” said Bob Bruck, Vice President and General Manager, Technology Manufacturing Engineering in Intel’s Technology and Manufacturing Group. “We, along with Samsung and TSMC, agree that the transition to 450 mm wafers will follow the same pattern of delivering increased value to our customers.”
Intel, Samsung, and TSMC indicate that the semiconductor industry can improve its return on investment and substantially reduce 450 mm research and development (R&D) costs by applying aligned standards, rationalising changes from 300 mm infrastructure and automation, and working toward a common timeline. The companies also agree that a cooperative approach will help minimise risk and transition costs.
“The transition to 450 mm wafers will benefit the entire ecosystem of the IC industry, and Intel, Samsung, TSMC will work together with suppliers and other semiconductor manufacturers to actively develop 450 mm capability,” said Cheong-Woo Byun, Senior Vice President, Memory Manufacturing Operation Centre, Samsung Electronics.
In the past, migration to the next larger wafer size traditionally began every 10 years after the last transition. For example, the industry began the transition to 300 mm wafers in 2001, a decade after the initial 200 mm manufacturing facilities (also known as “fabs”) were introduced in 1991.
Keeping in line with the historical pace of growth, Intel, Samsung, and TSMC agree that 2012 is an appropriate target to begin the 450 mm transition. Given the complexity of integrating all of the components for a transition of this size, the companies recognise that consistent evaluation of the target timeline will be critical to ensure industry-wide readiness.
“Increasing cost due to the complexity of advanced technology is a concern for the future,” said Mark Liu, TSMC’s Senior Vice President of Advanced Technology Business. “Intel, Samsung, and TSMC believe the transition to 450 mm wafers is a potential solution to maintain a reasonable cost structure for the industry.”
The three companies will continue to work with International Sematech (ISMI), as it plays a critical role in coordinating industry efforts on 450 mm wafer supply, standards setting and developing equipment test bed capabilities.