13th European Conference and Exhibition

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 August 2001



(2001), "13th European Conference and Exhibition", Microelectronics International, Vol. 18 No. 2. https://doi.org/10.1108/mi.2001.21818bac.001



Emerald Group Publishing Limited

Copyright © 2001, MCB UP Limited

13th European Conference and Exhibition

13th European Conference and Exhibition30 May - 1 June 2001 Strasbourg, France

Tuesday, 29 May 9:30-17:00Professional development courses

  • Course A: Use of laser in microelectronics packaging. Instructor: Gérard PACARY IREPA Laser Strasbourg – France.

  • Course B: MEMS technology: an overview Instructor: Lionel Buchaillot, I.E.M.N. Lille University – France.

  • Course C: HDI printed circuits technologies Instructors: Dominique NAVARRO (IXL Bordeaux University France) and Sylvain LEROUX (ATLANTEC Nantes France).

Wednesday 30 MayOpening ceremony and plenary session:

Conference chairs address: Yves Le Goff, Greg Caswel and Peter Barnwell.

Keynotes speeches: Olivier Nora, Gérard Matheron, Dietmar Harting and John W. Balde

Technical Programme Oral

  • 2:00 p.m. to 6:00 p.m. – W1 Flip Chip and area array.

  • 2:00 p.m. to 6:00 p.m. – W2 Embbeded passives.

Technical Programme Poster Sessions

  • 2:00 p.m. to 4:30 p.m. – Quality and reliability.

  • 2:00 p.m. to 4:30 p.m. – Modeling.

Thursday 31 May

Technical Programme Oral Sessions

  • 8:30 a.m. to 12:30 p.m. – T1.1 New material and process.

  • 8:30 a.m. to 12:30 p.m. – T1.2 Sensors and MEMS.

  • 8:30 a.m. to 12:30 p.m. – T2.1 Quality and reliability.

  • 8:30 a.m. to 12:30 p.m. – T2.2 Green electronics.

  • 2.00 a.m. to 05:00 p.m. – T2.2 Student Poster Session.

  • 2:00 p.m. to 06:00 p.m. – T1.3 Applications.

  • 2:00 p.m. to 06:00 p.m. – T2.3 Thermal management.

  • 2:00 p.m. to 06:00 p.m. – T2.4 High speed electronics.

Technical Programme Poster Sessions

  • 10:00 a.m. to 12:30 p.m. – New material and Processes.

  • 10:00 a.m. to 12:30 p.m. – Applications.

  • 10:00 a.m. to 12:30 p.m. – Environment.

Friday 1 June

Technical Programme Oral Sessions

  • 8:30 a.m. to 12:30 p.m. – High Density Interconnection.

  • 8:30 a.m. to 12:30 p.m. – 3D Technologies.

Closing Session: Best paper, best poster and European student awards. Next conferences.

Technical Programme Oral SessionsWednesday 30 May 2:00p.m. to 6:00p.m.

Session W1: Flip Chip and area array

Chairmen: Jens Müller and Soren Norlying.

  • The evaluation of different base materials for high density flip chip on flex applications – Petteri Palm, Jarmo Määttänen, Elcoteq Network Corporation, Finland.

  • Electrical conductive film for flip chip interconnection based on Z axis conductors – Jean-Charles Souriau, Pierre Renard, Claude Massit, Gilles Poupon, CEA-LETI, France.

  • Wafer level CSP with solder support structure – Jorg Jasper, EM-Marin, Switzerland.

  • Selecting and implementing solder paste inspection for flip-chip and CSP assembly – Rick Gunn, Greg Caswell, XeTel Corporation, USA; Bob Ries, CyberOptics Corporation, USA.


  • Micro-Raman spectroscopy study of the mechanical stress induced by BGA-assembly and validation by FEM – Jian Chen, Ingrid De Wolf, IMEC, Belgium.

  • FRBGA: A french solution for multi-application BGA – Stéphanie Rossi, Cimulec; D. Lambert, P. Courant, Bull; M. Massénat, Astrium; F. Baleras, CEA-LETI, J. Lecaplain, Matra BAe Dynamics; C. Jephos, Celar, France.

  • A new stencil performance for high density printing – Paradiso Coskina, Ulf Oestermann, Andreas Ostmann, Rolf Aschenbrenner, Herbert Reichl, University of Berlin, Germany.

  • Hyper BGA tm: a high performance, low stress, laminate ball grid array flip chip carrier – Marc Sanvoisin, IBM France.

Session W2: Embeded passives

Chairmen: Cian O'Mathuna and Gabor Harsanyi.

  • The NEMI roadmap perspective on integrated passives – Joseph Dougherty, Penn State University; John Galvagni, AVX; Larry Marcanti, NORTEL Networks; Peter Sandborn, University of Maryland; Rick Charbonneau, Storage Tek; Robert Sheffield, NORTEL Networks, USA.

  • Cofired multilayer varistor-capacitor device for combined transient and EMI suppression applications – Ramesh Raghavendra, Pat Bellew and Neil Mcloughlin, Littelfuse Ireland Limited, Ireland.

  • High Q planar spiral inductors for CATV filter applications – Deirdre de Bhailis, Bill Keeney, M/A-COM Eurotec, Ireland.

  • Integrated package MCM-D/L/BGA with embedded passives – Philippe Poyet and Gerard Teissier, THALES Microwave, France.


  • Wideband characterisation of trimmed and untrimmed buried resistors in LTCC – Karl-Heinz Drue and Heiko Thust, Illmenau Technical University, Germany; Erich Polzer, DuPont de Nemours GmbH, Germany.

  • Parameterized RFmodels of embedded resistor components using EM simulation in LTCC substrates – F. Johannsmann, G. Sommer, W. John, H. Reichl, Fraunhofer Institute Reliability and Microintegration (FhG-IZM), Germany; R. Henderson, T. Myers, M. Petras, M. Miller, Motorola, SPS, USA.

  • Technologies for integration of magnetic devices in printed circuit boards – M.A.M. Gijs, F. Amalou, M. Saidani, Swiss Federal Institute of Technology, Switzerland.

  • RF multi-layer thin film technology with integrated passives for the realization of RF-front-end systems – Kristof Vaesen, G. Carchon, S. Brebels, W. De Raedt, E. Beyne, IMEC, Belgium.

Poster Session – 2:00 p.m. to 4:30 p.m.

Chairmen: Jean-Louis Fouré and Michel Le Meau.

Session: Quality and reliability

  • Discrete power devices: heat transfer through design and process, in conjunction with reliability – Marie Guillot, General Semiconductor of Ireland (GSI), Ireland.

  • New approach to quality control in small electrotechnical companies – Ivan Szendiuch, Technical University, Brno, Czech Republic.

  • Selected problems of Microvia formation – Grazyna Koziol, Halina Hackiewicz, Tele & Radio Research Institute, Poland.

  • Simulation of solder joint reliability analysis for CBGA packages – Dominiek Degryse, Bart Vandevelde, Eric Beyne, IMEC, Belgium Filip Christiaens, Eric Roose, Dorina Corlatan, Alcatel Bell, Belgium.

  • Transfer molded underfills for flip chip in package – Bruce Cotterman, Cookson Semiconductor Packaging Materials, USA.

Session: Modeling

  • Bulk decoupling capacitors – Virgil Golumbeanu, Paul Svasta, Daniel Leonescu, Norocel Dragos Codreanu, University of Bucharest, Romania.

  • In-process warpage analysis of advanced package designs and printed circuit boards – Patrick B. Hassell, AkroMetrix, USA.

  • Don't waste time: simulate! – Johannes Adam, Flomerics, Germany.

  • Development of tools for evaluation of electrical performance of devices used in chip-on-board (COB) technology – A. Cordery, N. Kilbey, N. Suthiwongsunthorn, University of Oxford, UK.

  • Finite-element modeling: strain and stress distribution in adhesive bonded joints of 1206 chip components on FR-4 substrates – K.P. Friedel, R. Kisiel, University of Wroclaw, Poland.

  • Electrical conduction of adhesive joints in microwave applications – J. Felba, K.P. Friedel, University of Wroclaw, Poland.

  • Electrical conductivity of anisotropic conductive adhesive – Stéphane Charruau, THALES Avionics, France; Jan Vanfleteren, IMEC, Belgium.

Thursday 31 May - 8:30 a.m. to 12:30 p.m.

Session T1.1: New materials and processes

Chairmen: Eric Beyne and Darko Belavic.

  • Development of advanced non conductive paste (ANCP) for flip chip technology Yoshinobu Homma, Mads Juhl, Osamu Suzuki, Haruyuki Yoshii, Kenichi Suzuki, NAMICS Corporation, Japan.

  • Next generation packaging for fiber optics: new opportunities for thick film and LTCC ceramic technology – Samuel J. Horowitz, D.I. Amey, DuPont Microcircuit Materials, USA.

  • Low-cost thick-film strain gauge applications – Darko Belavic, Jozef Stefan Institute, Slovenia.

  • New adhesives based on cationic polymerisation – a system solution for applications in microelectronics – Michael Stumbeck, DELO Industrieklebstoffe GmbH, Germany.


Session T1.2: Sensors and MEMS

Chairmen: Eric Beyne and Darko Belavic.

  • Multilayer ceramic microsystems technology: an overview – David L. Wilcox, Motorola, USA.

  • Reliability approach in the design of RF microswitches – Lionel Buchaillot, L. Caillé, N. Rolland-Haese and P.A. Rolland, I.E.M.N., France.

  • Surface temperature distribution analysis in sensors with buried heater made in LTCC technology – Jaroslaw Kita, Andrzej Dziedzic, Kazimierz Friedel, Leszek J. Golonka, Pawel Janus, Roman Szeloch, University of Wroclaw, Poland.

  • MEMS for mobile communication – Emmanuel Quévy, C. Renaux, Lionel Buchaillot, D. Flandre, D.Collard, I.E.M.N., France.

Session T2.1: Quality and reliability

Chairmen: Jannick Guinet and Nihal Sinnadurai.

  • Characterisation of interfacial cracking in microelectronic packaging – Tom Davies, Instron Ltd, UK.

  • Methodology based on finite element simulations to evaluate the relation between accelerated ageing tests and real operation of IGBT power modules – J.M. Thébaud, E. Woirgard, C. Zardini, University of Bordeaux, France.

  • What kind of inspection techniques for tomorrow high density assemblies? – Michel Massénat, Alisson édition, Pierre-Jean Albrieux, IFTEC, France.

  • Acoustic micro imaging of fatigue cracking in solder joints of LTCC modules – Risto Rautioaho, Olli Nousiainen, Seppo Leppävuori, Dewei Tian, Jaakko Lenkkeri University of Oulu, Finland.


Session T2.2: Green electronics

Chairmen: Jannick Guinet and Nihal Sinnadurai.

  • New developments for high temperature electronics based on lead-free soldering – Koupaïa Henry, Valeo, France.

  • Lead-free surface finishes: a comparison of various alternatives with HASL/New developments in organic metal based immersion tin – Bernhard Wessling, Sabine Schröder, Ormecon Chemie, Germany.

  • Properties of some low temperature lead-free alloys – Jean Lepagnol, C.D.S., France.

  • Solder alternative: conductive adhesives with stable contact resistance – Geert Luyckx, G. Dreezen, Emerson & Cuming, Belgium.

Poster Session – 10:00 a.m. to 12:30 a.m.

Chairmen: Bernard Parmentier and Philippe Poyet.

Session : New materials and processes

  • Time dependent behavior of molding compound in packaging – G. Wisse, L.J. Ernst, Delft University of Technology, The Netherlands; G.Q. Zhang, Philips, The Netherlands.

  • Improved thermal management for MCA housings/RF packages using a beryllium metal matrix material – Thomas Parsonage, Brush Wellman, USA.

  • Use of an optical dilatometer for in-situ shrinkage measurement of LTCC multilayers – Matthias Wagner, Alfons, Sticgelschmitt; Andreas Roosen, University of Erlangen; Christa Schmaus, Siegert electronic GmbH; Dieter Schwanke, Micro Systems Engineering, Germany; Franz Bechtold, VIA electronic GmbH.

  • Trimming of thick-film-resistors by energy of high voltage pulses and its influence on microstructures – Waleed Ehrhardt, Heiko Thust, Ilmenau Technical University, Germany.

  • Measurement of frequency change of ultrasonic generator during wire bonding made on soft substrate – Ryszard Jezior, Zdzislaw Drozd, Jerzy Lasocki, Wlodzimierz Cukasik, Jan Orzechowski, Warsav University of Technology, Poland.

  • Rapid production of microwave packaging in silicon-aluminium by thin shell electroforming – C. Bocking, D.M. Jacobson, Centre for Rapid Design and Manufacture, UK.

  • Flip Chip BGA assembly: some process considerations – Xavier Baraton, STMicrolectronics, France.

Session: Applications

  • Exact reference electrode made by thick film technology – Jan Krejci, Munish Pandey, Dagmar Krejcova, Krejci Engineering, Czech Republic.

  • Design and calibration of a fold palladium thin-film microsensor for thermal imaging of laser beam waists – B. Serio, P. Nika, J.P. Prenel, CREST – IMFC, France.

  • The influence of exploitational factors on brightness degradation in screenprinted electroluminescent layers – Michal Clez, Andrzej Marek, Technical University, Poland.

Session: Environment

  • Lead-free soldering effect to tantalum capacitors – T. Zednicek, P. Vasina, Z. Sita, B. Vrana, AVX, Czech Republic.

  • The PSGA: a lead-free CSP for high performance and high reliable packaging – Bart Vandevelde, Evelien Driessens, Arun Chandrasekhar, Eric Beyne, IMEC, Belgium Jef Van Puymbroeck, Marcel Heerman, Siemens, Belgium.

Student poster session: 2:00 p.m. - 5:00 p.m.

Chairpersons: Suzanne Mounier and Pierre Levandowski.

A select number of outstanding students – as nominated by their respective chapter – will have a poster and oral presentation of their recent reseach accomplishments. At the conclusion of these presentations, a jury composed of members of the Technical Program Committee will choose and award the most outstanding(s) student(s) project(s). The results of the jury's decision will be announced and the awards presented during Friday's closing session.

Thursday 31 May 2:00 pm to 6:00 pm

Session T1.3: Applications

Chairmen: Claude Massit and Yvan Szendiuch.

  • Microwave glob-top and flip chip for GaAs' MMICs: a new route of packaging for space applications – Claude Drevon, Philippe Monfraix, Sébastien George, Jean Louis Cazaux, Alcatel, France.

  • Tape CSP (TCSP) for aeronautic and space applications – Daniel Lambert, Bull, F. Baleras, LETI; M. Massenat, Astrium; S. Rossi, Cimulec; P. Courant, Bull, France.

  • Advanced interconnections using conductive polymer lines – Philippe Patrice, GEMPLUS, France.

  • The use of TAB technology in a high energy physics experiment – Stéphane Bouvier, Subatech, France; Jean-Robert Lutz, IRES, France; Joël Pucci THALES Airborne systems, France; Patrick Courant, Bull SA, France.


  • Thick film multilayer solutions to demanding automotive electronic applications – Alan Buckthorpe, A. Niblett, J. Cocker, Dupont, UK; L. Benini, R. Torriani, R. Morano, Magneti-Marelli, Italy.

  • Switching converter for automotive applications: silicon and packaging development – Riccardo Groppo, FIAT, Italy; Erik Jung, University of Berlin, Germany.

  • Low temperature flip chip assembly for biomedical applications – Jan Vanfleteren, Björn Vandecasteele, Tomas Podprocky, Imec/Intec/TFCG, Belgium.

  • Low profile surface mounted antenna array – Jean-Marie Floc'h, Laurent Le Coq, Laurent Desclos, INSA/LCST, France.

Session T2.3: Thermal management

Chairmen: Leszek Golonka and Yves Stricot.

  • Active thermal management in LTCC – W. Kinzy Jones, Peng Wang, Yanquin Liu, University of Miami, USA.

  • Innovative cooling concept for highly integrated avionics modules – Jürgen Schulz-Harder, Karl Exel, Curamik; Lothar Hermann, EDAS, Germany.

  • Advanced microelectronic packaging using copper and tungsten – Juan L. Sepulveda, David E. Jech, Kirankumar H. Dalal, Jeffrey A. Karker, Brian Simmons, Brush Wellman, USA.

  • Vibration induced droplet atomization (VIDA) heat transfer cell for microelectronic thermal management – Ari Glezer, S.N. Heffington, W.Z. Black, Georgia Institute of Technology, USA.


Session T2.4: High speed interconnection

Chairmen: Leszek Golonka and Yves Stricot.

  • Low cost microwave modules using MCM-L technologies – A.M. Fiorello, M. Calori, Alenia Marconi Italy; J.C. Rames, Matra BAe Dynamics, N. Chandler, BAe Systems, P. Kertesz, Thomson, S. Rossi, Cimulec, France.

  • Study on low cost flip chip connection for high bit-rate SiGe devices – Carla Bassani, Luca Maggi, Arturo Canali, Giovanni Langio, Alcatel, Italy.

  • Fiber passive alignment on optoelectronic components for electro-optical link based on single chip technology and VCSELs – Jean-Charles Souriau, Alexandra Cobbe, Nicolas Delatouche, Claude Massit, CEA-LETI, France.

  • Characterization and analysis of ceramic interconnects at microwave frequencies – Charles Free, Zhengrong Tian, Keith Pitt, University of London UK; Peter Barnwell, Heraeus, USA.

Friday 1 June 8:30 a.m. to 12:30 p.m.

Session F1: High density interconnection

Chairmen: Brigitte Braux and Milos Somora.

  • Multilayer thin film technology on laminate substrates (MCM-LD) – Eric Beyne, Rita Van Hoof, Tomas Webers, IMEC; Stéphanie Rossi, CIMULEC France; Marianni Di Ianni, Bull, Italy; Andreas Ostmann, University of Berlin, Germany.

  • Technological evaluation of HDI substrates for space applications – Gianmario Giudici, LABEN SPA, Italy.

  • Reliability of a board technology for high-frequency applications – Johan De Baets, M. Vereeken, A. Van Calster, IMEC/TFCG, Belgium; D. Corlatan, E. Roose, A. Van Laere, Alcatel Telecom, Belgium; S. Mainwaring, G. Patra, S. Harris, Solectron, UK; M. Morell, C. Haley, Thomas Walter, UK; G. Schols, Alcatel Microelectronics, Belgium; A. Ostmann, University of Berlin, Germany; D. Mathelin, Alcatel Space industries, France.

  • Large area patterning of high density interconnects by novel UV-excimer lithography and photopatternable ORMOCER-dielectrica – Mats Robertsson, Per Dannetun, Joacim Haglund, ACREO, Sweden; Christian Johansson, Univ. of Linköping, Sweden; Michael Popall, Fraunhofer, Germany; Arne Tolvgard, Arne Alping, Ericsson, Sweden; Daniel Lambert, Bull, France; Lars Linden, Viasystems, Sweden.


  • Comparison of two cost analysis tools used to estimate the manufacturing cost of HDI substrates – Pascal Guilbault, Bull, France; P. Bodö, Acreo, Sweden; M. Scheffler, ETH. Switzerland.

  • Chip scale packaging or vhip on board: a study of tradeoffs – Jim Rates, Chip Supply, USA.

  • Gravure offset printing development for fine line thick film circuits – Juha Hagberg, Marko Pudas, Seppo Leppavuori, University of Oulu, Finland.

  • Extending gold thick film technology through materials and process development – Meg Tredinnick, David Malanga, Peter Barnwell, Heraeus, USA; Quentin Reynolds, Heraeus, UK.

Session F2: 3D technologies

  • Ultra thin chip vertical integration technique – S. Pinel, J. Tasselli, F. Lepinois, A. Marty, LAAS-CNRS, France; O. Vendier, M. Huan, Alcatel, France; E. Beyne, R. Van Hoof, IMEC, Belgium; S. Marco, J.R. Morante, Univ. of Barcelona, Spain.

  • Very high speed 3D "System on package" – Christian Val, 3D PLUS, France.

  • Low-profile flip chip assembly using ultra-thin ICs – Thomas Harder, Wolfgang Reinert, ISIT, Germany.

  • Flip chip with Stud Bump and non conductive paste for CSP-3D – J.F. Zeberli, F. Ferrando, Ph. Clot, J.M. Chenuz, Valtronic, Switzerland.


  • UV curable conductive adhesives for 3D-MID application – Achim Battermann, Panacol-Elosol, Germany; B. Günther, H. Schäfer, IFAM, Germany.

  • Molded interconnect devices (MID) technology: a new way for mechatronics products – Xavier Lambert, J. Guinet, M. Basile, P. Guitton, M. Tanne, Schneider Electric, France.

  • Stacked die package for mass production: an overview – Laurent Herard, Michel Garnier, STMicroelectronics, France.

  • Handling concepts for ultra thin wafers – Hugo Pristauz, Datacom, Germany.

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