Citation
(2001), "InterPACK '01®", Microelectronics International, Vol. 18 No. 1. https://doi.org/10.1108/mi.2001.21818aac.004
Publisher
:Emerald Group Publishing Limited
Copyright © 2001, MCB UP Limited
InterPACK '01®
InterPACK '01®
The PACIFIC RIM/International, IntersocietyElectronic Packaging Technical/Business Conference and Exhibition8-13 July 2001Hyatt Regency KauaiKauai, Hawaii, USAhttp://www.asme.org/conf/ipack01/
Sponsoring organizations
IEEE Components, Packaging and Manufacturing Technology Society (IEEE-CPMT).ASME Electrical and Electronics Packaging Division (ASME-EEPD).
Technical topics
Advanced electronics packaging processing.Lead free interconnect processing.Integral/integrated passives – materials and processing.Wafer level packaging materials and processing.Flip chip underfills.Moldable underfill materials and processes.CSP, BGA, and chip array processing.Flip chip on board process technology.Advanced surface mount assembly.Wafer level flip chip processing.High density wiring substrates and interconnect materials and processing.Advanced base substrate technology.Molding compounds and encapsulants.Lead free interconnect technology.Conductive adhesives.Semiconductor materials and processing.
Co-chairs
Daniel F. Baldwin, Georgia Institute of Technology, USA.Tel: +1 404-894-4135;E-mail: daniel.baldwin@me.gatech.edu
Sayan D. Mukherjee, Sandia National Laboratories, USA.Tel: +1 505-284-4161;E-mail: sdmukhe@sandia.gov
Noriyuki Miyazaki, Kyushu University, Japan.