BP Microsystems introduces high through-put Parallel Wafer Tester and Programmer, the BP-350

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 December 2000

33

Keywords

Citation

(2000), "BP Microsystems introduces high through-put Parallel Wafer Tester and Programmer, the BP-350", Microelectronics International, Vol. 17 No. 3. https://doi.org/10.1108/mi.2000.21817cad.011

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Emerald Group Publishing Limited

Copyright © 2000, MCB UP Limited


BP Microsystems introduces high through-put Parallel Wafer Tester and Programmer, the BP-350

BP Microsystems introduces high through-put Parallel Wafer Tester and Programmer, the BP-350

Keywords BP Microsystems, Testing

BP Microsystems Inc. has introduced the BP-350 Parallel Wafer Tester and Programmer.

The BP-350 (Plate 3) is designed to test and program Flash, EPROMs, EEPROMs, and Microcontrollers in the wafer and packaged part stages at a higher through-put – up to three times higher – than traditional vector-based methods. And, unlike current slower tester technology, the BP-350 combines the benefits of advanced wafer and packaged part testing with BP's expertise in device programming.

Plate 3 The BP-350

The BP-350 uses parallel test methodology for greater speed and throughput, and allows for rapid test pattern generation utilizing BP's High Level Programming Language. Beta customers have reported a three-time reduction in test costs and 95 percent increase in speed.

The BP-350's direct docking to the test prober and consequent zero footprint saves the large area of valuable floor space that other competing testers occupy. Direct docking to the wafer prober also eliminates waveform quality issues, as there are no connecting cables to produce signal errors. BP's latest programming technology – Fast Site 5 – is used with the BP-350 to parallel test up to four die simultaneously, and has up to 960 pin drivers.

Modular design of the BP-350 makes it easy to service and allows for boards to be swapped without removal from the prober. Pin drivers are therefore protected from damage due to bad DUTs or ESD. A self-test verifies the functionality of test hardware, and because it is self-calibrating, no internal adjustments are required; all of which translate to reliability.

For further information please contact: Stephan Beek at +1 (713) 688 4600 or visit www.bpmicro.com

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