AMKOR expands stacked chip-scale package capacity and 3D packaging family

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 December 2000

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Keywords

Citation

(2000), "AMKOR expands stacked chip-scale package capacity and 3D packaging family", Microelectronics International, Vol. 17 No. 3. https://doi.org/10.1108/mi.2000.21817cab.013

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Emerald Group Publishing Limited

Copyright © 2000, MCB UP Limited


AMKOR expands stacked chip-scale package capacity and 3D packaging family

AMKOR expands stacked chip-scale package capacity and 3D packaging family

Keywords Amkor Technology, Chip scale packaging

Amkor Technology has expanded its Stacked Chip Scale Package (S-CSP) production capacity to 400,000 units per week as the next step in its comprehensive plan to lead the industry in these advanced technology packages.

The company is also increasing its research and development budget for 3D packaging in preparation for the increased broad market demand in cellphones and new portable applications being forecast by leading analysts.

A recent study by Prismark Partners, a Cold Spring Harbor, NY market research/technology consulting firm, forecasts S-CSP Flash memory utilization in cellphones to grow from 2 percent in 1999 to 45 percent in 2003. This increased rate of utilization, coupled with continued growth of cellphone production from 258 million units in 1999 to a forecast 696 million units in 2003, creates a significant demand for S-CSP packages.

Amkor has delivered more than three million stacked chip scale packages to cellphone manufacturers in Japan and Europe since starting production last November. The major mobile phone suppliers were the first to recognize the benefits Stacked CSPs deliver, and are planning wider adoption in new model cellphones, according to industry studies. The company expects S-CSP deliveries to grow in the second half of 2000 as new customers begin receiving shipments.

Stacked CSP packages can include a range of device combinations, including Flash/SRAM, logic/memory, digital signal processors (DSP)/memory, logic/RF and others. Stacking two or more standard devices in a single package can be more cost-effective than System on a Chip or an embedded memory device. It also makes final installation of the package into its end product faster and less costly for the OEM.

To increase the reliability of the package while keeping it as thin as possible, Amkor uses a film adhesive between the top and bottom die. This process reduces the stress that typically occurs between the top and bottom die in the package. The S-CSP uses proven thin-core substrate material, thin ICs and a conventional ball grid array (BGA) configuration that matches existing surface mount technology and industry test and handling infrastructure.

Additionally, a stacked chip configuration permits more circuits and interconnection to exist within the package, which not only reduces the required component mounting area and input/output (I/O) on the motherboard, but also improves electrical performance and reliability. Amkor's technology platform also permits a larger variety of ICs and die sizes to be used in the package.

Stacked CSP packages have a maximum thickness of 1.4mm, with 0.5 to 0.8mm pitch on the I/O solder balls. An 8mm x 10mm x 1.4mm Flash/SRAM package can contain up to 100 I/Os. Logic/Flash, digital/analog and DSP/Flash combination packages can be up to 18mm on a side and contain over 200 I/Os.

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