Intarsia Corporation and Philips Integrated Passive Components to collaborate on standards for chip scale integrated passive devices

Citation

(1999), "Intarsia Corporation and Philips Integrated Passive Components to collaborate on standards for chip scale integrated passive devices", Microelectronics International, Vol. 16 No. 1. https://doi.org/10.1108/mi.1999.21816aab.006

Intarsia Corporation and Philips Integrated Passive Components to collaborate on standards for chip scale integrated passive devices

Intarsia Corporation and Philips Integrated Passive Components to collaborate on standards for chip scale integrated passive devices

Keywords Chip scale packaging, Intarsia Corporation, Philips

Intarsia Corporation and Philips Integrated Passive Components, a business unit of Philips Components, have announced plans to collaborate and jointly develop new standards for integrated passive devices in chip scale packages.

The collaborative effort will focus on developing standard peripheral and grid array packaging outlines for use in a variety of future portable and handheld electronic devices. With more than 50 different chip scale packaging technologies currently under development industrywide, the need for high-volume, low-cost solutions in standard outlines is growing. As strong proponents of wafer level chip scale packaging, Intarsia and Philips Integrated Passive Components will also explore new reliability and assembly processes to streamline the production process.

With such standards in place, Intarsia and Philips predict that chip scale packaging for integrated passive devices will become the preferred technology due to their lower cost. Both companies are adopting wafer level packaging processes to meet anticipated future demand.

Unlike existing plastic packages, wafer level chip scale packages will enable manufacturers to meet the performance and small form factor requirements of future miniaturized, handheld electronic devices. As a result, chip scale packages will be a better value and offer a tremendous competitive advantage in the marketplace.

Chip scale packagingOf the more than 50 different chip scale packaging technologies currently in development, the most familiar type of chip scale packaging technology uses an interposer to route the I/Os off the chip into a pitch that can be more easily assembled using standard surface mount technology processes. The interposer type of chip scale package has a slightly higher cost profile than standard surface mount packages. Wafer level chip scale packages, on the other hand, utilize semiconductor processes to maintain a lower cost platform.

For further information please contact Ad Jansen, Philips Passive Components. Fax: +31 40 272 20 29.