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THERMO‐ELECTRIC STUDY OF THE TRENCH‐GATE POWER VDMOS TRANSISTOR

J. Zeng (Department of Electrical and Electronic Engineering, University of Wales, Singleton Park, Swansea SA2 8PP, U.K)
P.A. Mawby (Department of Electrical and Electronic Engineering, University of Wales, Singleton Park, Swansea SA2 8PP, U.K)
M.S. Towers (Department of Electrical and Electronic Engineering, University of Wales, Singleton Park, Swansea SA2 8PP, U.K)
K. Board (Department of Electrical and Electronic Engineering, University of Wales, Singleton Park, Swansea SA2 8PP, U.K)

Abstract

In this paper, the 2‐D numerical analysis is used to investigate the electro‐thermal performance of a trench power VDMOS transistor having a much reduced quasi‐saturation effect over the conventional VDMOS structure. Taking into account all the appropriate physical mechanisms, the analysis self‐consistently solves Poisson's equation, the electron continuity equation and the heat flow equation. The results show that the trench structure introduced enables the device to operate at higher current levels due to a favorable change in current density distribution within the device. However, these two effects can increase the self‐heating of the device, decrease the forward current and degrade the thermal stability of the new structure. Nevertheless the new device is still found to provide a higher quasi‐saturation current than the conventional VDMOS device even when thermal effects are taken into account.

Citation

Zeng, J., Mawby, P.A., Towers, M.S. and Board, K. (1994), "THERMO‐ELECTRIC STUDY OF THE TRENCH‐GATE POWER VDMOS TRANSISTOR", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 13 No. 4, pp. 735-742. https://doi.org/10.1108/eb051891

Publisher

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MCB UP Ltd

Copyright © 1994, MCB UP Limited

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