Interconnection Techniques for GaAs Packaging

Abstract

In the never‐ending quest for speed, designers are now turning to digital GaAs integrated circuits both to extend the bandwidth of current designs and in some cases to generate a whole new class of products never before possible. The engineer well versed in high speed ECL design techniques generally understands the problems associated with this transfer to GaAs logic. However, even with the design task well defined, the exact solution for interconnecting devices is often difficult and stresses the capabilities of existing multilayer printed circuit techniques using conventional dielectric materials and processing. This paper examines the design task in detail, and will present recent developments in shielded discrete wiring techniques as a possible solution for GaAs packaging.

Citation

Buck, T.J. (1991), "Interconnection Techniques for GaAs Packaging", Circuit World, Vol. 18 No. 1, pp. 22-33. https://doi.org/10.1108/eb046151