Accelerated Life Testing of Small‐Geometry Printed Circuit Boards

Abstract

The accelerated life test methods used by British Telecom to demonstrate the probability of 20 year life of electronic components in non‐hermetic packages have now been applied to small geometry printed circuit boards from four different manufacturers. The reliability hazards found included the migration of copper from conductor tracks through one dry‐film solder resist, and the delamination of a second from the board. Wet‐film solder resists caused comparatively minor problems. Migration of lead and tin across the exposed surface of a board between solder pads was also observed, probably due to inadequate cleaning.

Citation

Sutherland, R.R. and Videlo, I.D.E. (1985), "Accelerated Life Testing of Small‐Geometry Printed Circuit Boards", Circuit World, Vol. 11 No. 3, pp. 35-40. https://doi.org/10.1108/eb046002