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Packaging Options for High Lead Count ASIC Devices

S.T. Riches (The Welding Institute, Abington, Cambridge, England)

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 March 1990

21

Abstract

Selection of the correct interconnection technique for high lead count integrated circuits is dependent on technical and economic factors, in particular in small batch production of application specific devices (ASICs). This paper reviews some of the interconnection options and describes work where some advances in high density interconnection have been made.

Citation

Riches, S.T. (1990), "Packaging Options for High Lead Count ASIC Devices", Microelectronics International, Vol. 7 No. 3, pp. 14-21. https://doi.org/10.1108/eb044421

Publisher

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MCB UP Ltd

Copyright © 1990, MCB UP Limited

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