High‐density Multichip Module by Chip‐on‐Wafer Technology

Abstract

A high‐density module for image processing was developed by chip‐on‐wafer technology. A silicon wafer was used as the substrate and the LSI chips were flip‐chip bonded to the silicon wafer by bumps in chip‐on‐wafer technology. A primary benefit of using a silicon wafer is the little induced thermal stress which affects the bumps. The module contained a digital signal processor, SRAMs and other peripheral LSls. A total of sixteen chips were bonded on the wafer. The LSIs were connected to each other by copper/polyimide multilayer interconnections consisting of eight copper conductive layers and polyimide dielectric layers. The characteristic impedance for the signal lines was controlled to 50 ohms. The LSIs were connected to the wafer electrically and mechanically by solder bumps, which were formed on the LSI bonding pads. A 188 pin AIN ceramic package was used for the module in order to obtain high heat radiation and high reliability. The occupied area for the module was reduced to 20%, compared with the size for conventionally assembled DIPs on a PC board.

Citation

Kimijima, S., Miyagi, T., Sudo, T. and Shimada, O. (1990), "High‐density Multichip Module by Chip‐on‐Wafer Technology", Microelectronics International, Vol. 7 No. 1, pp. 33-35. https://doi.org/10.1108/eb044400