Reduced Instruction Set Computer (RISC) processors represent a different way to design a CPU for a workstation. They are not magical elixirs to supercharge a personal computer into a mainframe; rather, they are simply a different approach to handling information. RISC design has already affected the architecture of more traditional CISC (Complex Instruction Set Computer) processors and will continue to do so well into the next decade. Given the wealth of software written for CISC processors and the pau‐city of RISC shaped applications, combined with the usual lag in software development behind any hardware breakthrough, a full‐fledged RISC library workstation may not appear for some time. Nevertheless RISC has earned a great deal of attention since its practical birth at IBM in 1976 by John Cocke and its pursuit in academic circles at Stanford and the University of California, Berkeley in the early 1980s. Bom from the simple idea of devising a way to complete a computer instruction in a single cycle of a processor, RISC architecture has been called the de facto standard of the next decade for workstations by some and a mere fad by others. Will these chips replace CISC processors entirely? Will they have an impact on library workstations? And will they ever appear in one form or another in the Macintosh? With RISC processors available from MIPS Computer Systems, Motorola, and Sun, and RISC‐based computers produced by Apollo, Sun, Everex, Hewlett‐Packard, and others, RISC is certainly a harbinger of the future of processors in workstations. The market for RISC‐based worksta‐tions is heating up as some manufacturers — Sun, DEC, Data General to mention a few — battle for customers by lowering prices and raising performance.
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