Institute of Materials, Minerals and Mining – Materials Congress 2004

Circuit World

ISSN: 0305-6120

Article publication date: 1 December 2004

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Citation

Goosey, M. (2004), "Institute of Materials, Minerals and Mining – Materials Congress 2004", Circuit World, Vol. 30 No. 4. https://doi.org/10.1108/cw.2004.21730dac.004

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Emerald Group Publishing Limited

Copyright © 2004, Emerald Group Publishing Limited


Institute of Materials, Minerals and Mining – Materials Congress 2004

Institute of Materials, Minerals and Mining – Materials Congress 2004

30 March-1 April 2004, London

Review of the Symposium on Packaging of Electronic Devices – 30 March 2004

Keywords: Conferences, Electronics industry, Packaging

The Institute of Materials, Minerals and Mining held its 2004 Materials Congress at the end of March and beginning of April in the magnificent historic buildings of Carlton House Terrace in the centre of London. The programme included around 40 plenary and keynote lectures and hundreds of contributed papers covering the main areas of materials science and engineering. Of particular interest to those involved in electronics was the Symposium on Packaging of Electronic Devices and it is this which is reported below.

The Symposium was chaired by Dr David Pedder, who was representing the EPPIC Faraday Partnership and TWI Ltd, and there was coverage of a wide range of interconnection and packaging topics by eight speakers from the UK, Belgium and the USA.

In a change to the advertised order, the morning session was opened by Chris Bailey, from the University of Greenwich, who gave a paper entitled "Reliability Predictions – Past, Present and Future". In his presentation, Chris discussed the physics of failure approach and how it combined accelerated testing with computational modelling. The methodology allowed behavioural predictions to be made based on product geometry, materials used and operating conditions. The modelling enabled predictions to be made of stresses from thermal, mechanical, chemical and electrical effects. An example given was that of wave soldering and the effects of oxygen levels at or near the solder bath on reliability. There was a need to minimise the amount of oxygen and computational fluid dynamics had been used to determine how oxygen entered the equipment when circuit boards were being soldered. Higher flow rates of nitrogen helped to reduce the amount of oxygen entering and modelling had helped both with the design of the nitrogen injectors and to determine the flow.

A second example given was the use of finite element analysis to optimise process conditions in order to minimise solder joint fatigue and stress in the die of a flip-chip assembly. Design parameters investigated included the Young's modulus and thermal expansion coefficient of the underfill, stand-off height and substrate thickness. The solder joint fatigue behaviour was studied for various combinations of the above properties.

There were a number of commercially available software packages that enabled this type of study to be undertaken. In the future it was predicted that we would see this type of modelling happening right across the supply chain. Chris concluded by referring to the new IEEE Reliability Prediction Standard (1413.1).

The next presentation was given by Dr Liz Logan on behalf of Jan Vordemann of Tech. Search International Inc., USA, who was unable to attend the meeting. In a presentation entitled "Semiconductor Packaging Materials: 2004 Outlook and Future Trends", Dr Logan highlighted the trend to area array packaging and the growth in the use of BGAs and how they offered higher margins regardless of pin count. The use of area array packaging was driving changes in both packaging materials and processes with, for example, the move away from wire bonding to flip-chip on to laminate within the packages. The market for semiconductor plastic packaging was set to grow from $7.9 billion in 2003 to $10.3 billion in 2006, with $2.3 billion being accounted for by organic substrates. Eighty six percent of this would be in the Far East! Large growth was also predicted for flip-chip with solder bump growth for both 2004 and 2005 expected to be 48 percent. Most growth would be in flip-chip in a package, with only small growth occurring in flip-chip on board. Wafer level packaging was also expanding rapidly with the key issues being form factor and performance and major applications being in PDAs and mobile phones. The main materials used were BCBs but new types of polyimides were also coming on stream.

Clive Hall of Element Six in The Netherlands, then gave an overview of Diamond as a Thermal Management and Packaging Material and in his presentation Clive covered materials, properties and processing. Diamond based materials had found use in microprocessors, laser diodes, laser diode arrays and a variety of other applications and it was a very valuable material for dissipating heat. There were three main types of diamond and these were thick film CVD, thin film CVD and sintered diamond composites. The thin film CVD materials were generally lower in cost than the thick film materials and the diamond was typically deposited on a high thermal conductivity substrate such as silicon carbide or aluminium nitride in thicknesses of 20-40 μm. The sintered diamond composites offered thermal conductivities of around 600 W/ mK and thermal expansion coefficients of 3 ppm/°C. This was compared to the >1,800 W/mK for thick film diamond and 400 W/mK for copper, 260 W/mK for beryllia, 170 W/mK for commercial aluminium nitride and 35 W/mK for alumina. Pure diamond had a coefficient of thermal expansion of only 0.9 ppm/°C and was highly insulating with a resistivity of 1013 Ωcm, although it could be doped to increase its conductivity. Diamond is typically very optically transmissive over a broad wavelength band and is typically processed using conventional polishing techniques and laser cutting. Typical metallisation systems included titanium, platinum, gold coatings and solders such as gold-tin and indium-gold were used. Various examples were given of where diamond had been used to improve thermal performance and these included a 25 percent improvement in the temperature performance of a laser diode array. It was stated that if diamond is doped with boron it can be used as a thermistor and can be employed to track temperature changes with a very fast response.

The fourth presentation of the day was given by Dr Bob Newman of Goodrich Engine Controls and this covered the use of plastic encapsulated devices in high reliability, long life electronics applications. Bob began by stating that there had been increasing use of commercial off the shelf (COTS) and plastic encapsulated devices (PEDs) in civil avionics applications since the 1990s. The safe use of COTS and PEDs in high reliability safety critical applications had thus become a major risk item. Operating environments in aircraft engines were extremely harsh and yet an operational life of 25 years was required with a mean time before failure of 30,000 h. A study had shown that PED reliability could be as good or better than full MIL specification parts in equally harsh conditions. Work had been carried out using scanning acoustic microscopy (SAM) to study the impact of altitude and climatic effects on PED life and reliability. The analysis had failed to reveal any corrosion and no encapsulation related issues had been found. It was concluded there was no inherent reason why PEDs may not be used in harsh environments. Goodrich had also worked with CALCE, Maryland, USA to study old stored devices and again no significant problems were found. A detailed study had also been carried out on a missile application where functioning after long-term dormant storage was a requirement. The results of all of these studies had indicted that COTS PEDs can equal and surpass the reliability of hermetically packaged devices. This had been demonstrated in a civil aircraft engine control module which had achieved a total of 51.5 million hours with no failures. Bob did emphasize, however, that it was important that components were selected using defined criteria (e.g. see Technical Specification IEC TS 62239). There were also a number of new concerns emerging with COTs due to the move to factors such as lead- free assembly, single event effects due to radiation and the fact that some components were being designed to have shorter lives. All of these would need to be taken into account when making failure predictions for new products.

Dr Liz Logan then returned to make her own presentation on developments in packaging and interconnection for highly integrated electronic systems. Dr Logan began by re-emphasizing the well-known drivers for electronics i.e. smaller size, portability, and more functionality at reduced cost. She highlighted progress in portable wireless systems, which was the classic example of the mass production of leading edge technology. Mobile phones had become significantly smaller whilst incorporating many more functions. This had been achieved by improvements in many areas: individual ICs had been enhanced, there had been a move to the use of chipsets to reduce the component count and to simplify circuit board design. There had been a move from peripheral to array type packaging and high-density interconnects with microvias were widely used. Chip scale packaging in Japan was now down to 0.4 mm pitch but the number of passive components had not yet reduced significantly and 0201 use was only just starting. Over- moulded modules on laminate substrates were becoming increasingly popular in mobile phone applications, particularly at the RF end but passives were still occupying a significant area of the surface and thus there was a growing need to bury them within the substrate. Some interesting work being undertaken by Georgia Institute of Technology was described wherein silver filled epoxies were being used as high dielectric constant materials. The quantity of silver used was sufficient to take the loading to just below the percolation point and here the dielectric constant rapidly rises to around 2,000. However, there was a very narrow window where this was achieved and work was being undertaken to use aluminium where the surface of the articles could be passivated to prevent shorting at high loadings. Dr Logan also described novel inductors made from MoCr scaffolds which were electroplated after formation by self assembly. This was described as stressed metal technology.

The next speaker was Dr Martin Goosey from Rohm and Haas Electronic Materials (formerly Shipley) in Coventry and he gave an overview of the current status of embedded component technologies. Martin began by outlining the reasons why there was a growing need to remove passive components from the surface of a substrate and to bury them inside. In addition to freeing up valuable area on the surface of the board, burying passives could offer a number of benefits including the location of components nearer to where they were needed and the possibility of improved reliability. The novel Combustion Chemical Vapour Deposition (CCVD) process developed by Shipley and, more recently, Rohm and Haas to deposit doped platinum thin film resistors was described, as was the process for integrating the sheet resistor material into conventional multilayer circuit board structures. There were a number of possible routes available for integrating and forming such resistor structures and some of the techniques being adopted by other companies were also discussed. Routes for forming and integrating capacitors were also described, and again the route taken by Rohm and Haas was compared and contrasted with methods developed by others. Some processes had been available commercially for over 20 years. The presentation concluded with brief details of other embedded components, such as the magnetic materials and inductors developed by the NMRC in Ireland. There was a growing need to remove passive components from the surface of printed circuit boards and the new methods for embedding them into the substrate would find increasing adoption in the near future.

Tim Simmons of Bookham Technology who deputised for R.A. Bell with a presentation entitled "Cost effective monolithic/hybrid fibre optics packaging solutions" gave the penultimate paper of the afternoon session. There had been a huge downturn in the fibre optics industry since 2000 and, as with many other sectors of the electronics industry, cost reduction was the order of the day. Many of Bookham's customers had also contracted in size and their engineering teams had also either reduced in size or disappeared altogether. This meant that Bookham had to provide a higher degree of integration and functionality on the modules they supplied and this was seen by the systems providers as a way to achieve lower component and development costs. Tim also gave details of the so-called multisource agreements where rival suppliers all agreed to supply parts that were identical in form and fit. The example discussed was a Mach-Zender modulator, which was gallium arsenide based and operated at 10 GHz. A comparison of a hybrid and an integrated module was made with the integrated approach being clearly desirable, as it offered benefits to both customers and the supplier.

Gavin Williams of Sheffield University gave the final presentation of the day in which he covered novel 3D interconnection processes. Gavin described how 3D interconnection technology was used in applications such as MEMS, microfluidics, 3D circuit boards and novel chip packaging. One of the key challenges in the formation of 3D circuitry was in the imaging of fine features. The use of a planar mask was not possible for many applications due to diffraction issues and the subject of Fresnel diffraction was discussed to highlight these problems. Also, it was not possible for many 3D applications to use conventional photoresists because they can't be applied using standard techniques such as lamination or spinning. Resists were sometimes sprayed but there were limitations as steep sidewalls and deep holes could not be accommodated. In work carried out at Sheffield, novel negative and positive working electrophoretically depositable resists (EDR) supplied by Rohm and Haas had been utilised. These had been used as part of a process to deposit nickel or copper tracks onto a piezoelectric inkjet print head from XAAR. This print head was capable of 360 dpi resolution with a 16 level grey scale. Future plans were to deposit 20 μm track and gap features over 80° slopes.

Overall this session provided a good overview of some of the challenges and new developments in electronics interconnection and packaging. It will be interesting to see how quickly some of these find their way into mainstream applications. In many cases the further development of advanced multifunctional, small, low cost integrated electronics will not be possible without the adoption of some of these radical and highly innovative solutions.

Martin GooseyEditor of Circuit World