Report on Intellect Business Briefing – 25 September 2002

Circuit World

ISSN: 0305-6120

Article publication date: 1 June 2003

49

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Citation

Coultard, F. (2003), "Report on Intellect Business Briefing – 25 September 2002", Circuit World, Vol. 29 No. 2. https://doi.org/10.1108/cw.2003.21729bac.002

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Emerald Group Publishing Limited

Copyright © 2003, MCB UP Limited


Report on Intellect Business Briefing – 25 September 2002

Report on Intellect Business Briefing – 25 September 2002

“High Density Interconnect (HDI) - The Way Forward”, Royal National Hotel, London

Keywords: Intellect

There was an excellent attendance at this, the third Business Briefing of Intellect’s Components and Manufacturing Sector in the last 12 months. They are proving popular. Congratulations to those who attended, for we were blessed with the annoying effects of a tube strike on this day. All made great efforts to attend in difficult circumstances.

High Density Interconnection (HDI) challenges were the subjects discussed by an impressive list of seven speakers during the full day at a hotel local to Intellect’s offices in Russell Square.

Dr. Philip Hargrave, Chief Scientist for Nortel Networks in Europe had kindly agreed to chair the proceedings and he set the scene excellently by emphasising the critical importance of HDI to his field, namely Telecommunications. Whereas before January 1st 2001 the topic was gathering momentum to address the potential in speeding up to say 160 Gb/s, the downturn brought a reality of perfecting the challenges of remaining for a while at 10 Gb/s and particularly the need to overcome the difficulties involved in parallel streams. All the time giving Moore’s Law time to catch up. The combination of need is to increase the density of interconnection with the additional challenge of forever driving costs down. There is no doubt that HDI is central to the Telecommunications Industry.

Dr. Martin Goosey, Chief Scientist of Shipley Europe, gave a spirited paper entitled “Copper Electroplating Technology for Microvia Filling”. We have grown accustomed to the style of Shipley’s public presentations; they are mostly generic, very soundly based but gently introducing the technology service that this excellent company provides so well to the industry worldwide. Martin is a great protagonist of this technique and this was no exception. Microvia technology is increasingly necessary to enable the fabrication of efficient high density interconnections in printed circuit work. Via-filling is a relatively new technology that complements this procedure. The products and techniques available from Shipley to achieve desired results for this were described. Many factors need to be controlled such as the level of additives, current density and agitation during plating. An innovative copper electroplating process for via filling was described whilst emphasising that it is an enabling technology for HDI and Sequential Build Up (SBU) techniques. This type of technology had already been taken up by the Japanese industry and Shipley’s electrochemical process would shortly be available for DC based plating. A pulse plating version would be introduced in 2003.

Steve Jones of the Invotec Group has a long and well respected track record in the PCB industry and he gave a very informative paper “The Future: EHDI, Even Higher Density Interconnect”. The agenda included a reality check of the current position, reference to key design rules, types of process variation, sources of error, relevant benchmarking, the measurement of capability and the way forward. Yield alone will not guarantee survival for PCB makers, the numbers of layers and aspect ratios will increase as will circuit speeds. Is 3G and in-board optics a mirage? Design rules should be focused more on achieving accurate feature to feature registration and less on etching fine lines and plating small holes. 1 micron is 1 per cent of the design rule; imperative to think in microns and ppm. Move the zone of capability further out from the PCB panel centre and improve yield on large panels. Much detailed work on this last point was described. At present we are not well placed to compete on large panels with manufacturers in the Far East. Process variations must be analytically better understood if we are to compete effectively. This was a splendid reference paper for a PCB strategy for the future.

Mike Osmond’s (Plexus Technology Group) presentation was entitled “HDI Board Design – A Balanced Approach”. HDI can bring many benefits such as efficiently increased circuit density, better electrical performance, lower cost and higher reliability. To produce these potential gains the designer has an important role and should tackle the challenges with a balanced approach to avoid the many pitfalls. Leading tools should be employed and simulation of signal integrity and manufacturability is essential. Ever increasing edge speeds make retention of signal integrity more difficult, e.g. shorter interconnect lengths and the need for improved electrical layout partitioning, decreasing dielectric constant and greatly improved power plane performance. Design often fights with fabrication yields. It is imperative that the designer works closely with the fabricator and knows the capability of the process. This applies equally to assembly and test procedures. The maxim for the designer should be to balance the best possible performance with the lowest unit cost; a highly practical paper from a leading extremely effective designer.

Celestica’s Mike Hendrikson presented “Pushing the HDI Limits – sub 100 micron FCA”. He gave us a privileged view of some of the advanced work being carried out by Celestica. A Technology Overview was followed by the methodology employed with results and then conclusions. Emphasis was laid on the need to cooperate with Universities, no fewer than four in their case and the imperative reliance on modelling. Illustrations showed the finesse and dimension transition from wire-bond technology to Flip Chip Attach (FCA). The latest area array packaging such as BGA, CSP and Flip Chip solutions necessitate geometries towards 0.100 mm pitch with volume production having to adopt SMT type techniques. Pb-free solder paste developments were discussed with successful stencil-free procedures with 0.050 mm thick electroformed Ni stencils and aperture structures of 0.050 to 0.090 mm. These were real solutions to future needs and involved much very diligent, professional work.

Dr. Ulrich Wallenhorst of Harting had a beastly journey from Germany that morning; salutations to him! He made it in time! Just as well for he gave a superb paper “Practical Considerations in Implementing Multi-Gigabit Backplane Interconnection Systems”. Now we were moving into the PCB influence on multi-gigabit system design. He explored design performance and application of high-speed connectors at multi- gigabit data rates and also illustrated an architectural approach to maximising signal integrity performance. The concept of “eye- opening” and the related influences such as trace length, width, dielectric losses and PCB construction styles were explained. He then showed us a stunning animated illustration of the energy distribution of a signal passing through a via multi-layer PCB, followed by one traversing a connector and via; the audience was quiet as these empirical images were shown several times. In the appraisal of examples of cross connect versus traditional backplane design we saw detailed eye diagram comparisons at 5 Gb/s and the diagrams to illustrate the effects.

Jim Vincent of Bookham Technology is noted for his relaxed and highly intelligent style. He makes difficult subjects easy to understand and this was another fine example. The overview covered the necessary references and then we were into the real stuff. Fact: about 40,000 movies have been released in the USA. At 4 Gb/movie this equals about 1,000 T (or 1 brain state). A 10 Ts optical link will transmit this in approximately 2 min. This is the attraction of the optical technology. Jim illustrated the elements of a multi-channel optical link and the mechanisms for lasers to modules. An old design transmitter module was laid bare and then the packaging and interconnection challenges were discussed; integration of electronic functions, non-hermetic packaging, new substrates and the relentless need to reducing costs were all referred to. Super animation was used to spark design tools modelling of components within the package. Again modelling of a driver amplifier with a metal lid was shown. Where next he said! Hybrid optical assembly to mirror the SMT revolution. Integrate all optical functions on a single chip. Tightly toleranced interfaces will be integral to our lives for years to come. Integration of electronics functions into optical systems packaging is inevitable; 40/50 GHz is not the finish.

John Berrie of Zuken had a hard act to follow but he met the challenge extremely well. Charismatic and passionately interested in his subject he enthused and caught the audience. Why optical interconnect? Concept of on PCB optical interconnect? Optical SI/EMC and then the way forward. Zuken’s responsible EDA vendor stance in the industry came out with the partly generic and partly analytical approach to the EDA position. Key words to back optical interconnect necessity are “Bandwidth, SI and EMC”. Short rise times compute with more reflections, more cross-talk and more copper, hence the pull. The way forward embraces promises of better SI/EMC, higher data rates and the probable sequence is likely to be long range telecommunications (already), system-level/ peripheral (some now) and board level.

Philip Hargrave then summed the day succinctly with the reminder of a feet on the ground approach and attention to drivers plus a big thanks to the contributors of the day. We all then departed with an unknown travel plan because of the bedlam outside with no tube trains operating due to the one day strike.

Frank CoultardIntellect

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