Structured ASIC technology for military and aerospace SoCs and FPGA-to-ASIC conversions

Aircraft Engineering and Aerospace Technology

ISSN: 0002-2667

Article publication date: 4 July 2008



(2008), "Structured ASIC technology for military and aerospace SoCs and FPGA-to-ASIC conversions", Aircraft Engineering and Aerospace Technology, Vol. 80 No. 4.



Emerald Group Publishing Limited

Copyright © 2008, Emerald Group Publishing Limited

Structured ASIC technology for military and aerospace SoCs and FPGA-to-ASIC conversions

Article Type: Equipment and software From: Aircraft Engineering and Aerospace Technology: An International Journal, Volume 80, Issue 4

ON Semiconductor, a supplier of power management solutions, has announced that XPressArray-II (XPA-II), a leading structured ASIC technology formerly offered by AMI Semiconductor, is now available for military specification operating temperatures (as the M-XPA-II family).

By providing operation across the full military operating temperature range of −55 to +125°C, XPA-II reportedly provides military and aerospace manufacturers with a cost-effective route to creating leading-edge ASICs and FPGA-to-ASIC conversions with minimum time to market. On-shore production and full ITAR compliance is assured through all stages of the development process, from initial design through to back-end packaging and test.

XPA-II is targeted at medium-density, high-speed 1.5 V ASIC applications and FPGA-to-ASIC conversions. The structured ASIC family offers a true drop-in alternative for a variety of FPGAs, including Altera APEX-II and Stratix technologies and Xilinx Virtex-ll solutions.

Based on a hybrid-fabrication process, XPA-II combines advanced 0.15 μm TSMC process technology with programmable metal using ON Semiconductor’s own state-of-the-art manufacturing facilities. The result is said to be an innovative next-generation technology platform that dramatically reduces development time for system-on-chip (SoC) applications while delivering significant NRE (non-recurring engineering costs) and unit cost savings.

Operating with system clock speeds up to 210 MHz for 18 × 18 soft multipliers and local clocks up to 500 MHz, XPA-II 0.15 μm devices deliver high performance, low-power ASIC solutions with densities to 4.8M ASIC gates. Configurable memory ranges from 258 kb to 4.8 Mb, increasing to 6.1 Mb with the addition of distributed configurable memory.

The XPA-II I/O technology includes fully configurable signal, core and I/O power supply pad locations and support for a wide range of I/O standards, including PCI, PCI-X, Mode 1 and Mode 2, GTL, HSTL, SSTL and LVPECL. The I/O technology also features a DDR memory interface and 1 Gbps low-voltage differential signalling. All of these features are available in a platform that supports power dissipation of just 55 nW/MHz/gate, reducing total chip power consumption to less than 20 per cent of a standard FPGA. High-fault coverage is provided through integrated scan-test, memory BIST and JTAG support.

“XPressArray-II has become an established technology for allowing electronic equipment manufacturers to achieve better cost, performance and power specifications than FPGAs and quicker time to market than cell-based solutions,” states Dave Locke, ON Semiconductor mil/aero Product Manager. “Compatibility with the military operating temperature range extends these benefits to military and aerospace manufacturers and eliminates the risk and the cost associated with upscreening alternative solutions.”

For further details, please contact: ON Semiconductor, Tel.: +1 208 234 6890, e-mail:

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