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Linearized differential current sensor in low-voltage CMOS

Neil Naudé (Department of Electrical, Electronic and Computer Engineering, University of Pretoria, Pretoria, South Africa)
Saurabh Sinha (Department of Electrical, Electronic and Computer Engineering, University of Pretoria, Pretoria, South Africa and Faculty of Engineering and the Built Environment, University of Johannesburg, Johannesburg, South Africa)

Microelectronics International

ISSN: 1356-5362

Article publication date: 2 May 2017




This work aims to improve upon the linearity of integrated CMOS current sensors used in switch mode power supply topologies, using a low-cost and low-voltage (less than 1.2 V) CMOS technology node. Improved sensor accuracy contributes to efficiency in switched supplies by reducing measurement errors when it is integrated with closed-loop control.


Integrated current-sensing methods were investigated and CMOS solutions were prioritized. These solutions were implemented and characterized in the desired process and shortcomings were identified. A theoretical analysis accompanied by simulated tests was used to refine improvements which were prototyped. The current sensor prototypes were fabricated and tested.


Measured and simulated results are presented which show improved linearity in current sensor outputs. Techniques borrowed from analog amplifier design can be used to improve the dynamic range and linearity of current-steered CMOS pairs for measuring current. A current sensor with a gain of 5 V/A operating in a 10 MHz switch mode supply environment is demonstrated.


This paper proposes an alternative approach to creating suitable bias conditions for linearity in a SenseFET topology. The proposed method is compact and architecturally simple in comparison to other techniques.



Naudé, N. and Sinha, S. (2017), "Linearized differential current sensor in low-voltage CMOS", Microelectronics International, Vol. 34 No. 2, pp. 91-98.



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Copyright © 2017, Emerald Publishing Limited

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