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The tunnelling and electron injection reliabilities for FG transistors

Bongani C. Mabuza (Department of Electrical, Electronic and Computer Engineering, University of Pretoria, Pretoria, South Africa)
Saurabh Sinha (Department of Electrical, Electronic and Computer Engineering, University of Pretoria, Pretoria, South Africa)

Microelectronics International

ISSN: 1356-5362

Article publication date: 29 April 2014

81

Abstract

Purpose

The purpose of this paper was to present the results of the three types of FG transistors that were investigated. The reliability issues of oxide thickness due to programming, fabrication defects and process variation may cause leakage currents and thus charge retention failure in the floating gate (FG).

Design/methodology/approach

The tunnelling and electron injection methods were applied to program FG devices of different lengths (180 and 350 nm) and coupling capacitor sizes. The drain current and threshold voltage changes were determined for both gate and drain voltage sweep. The devices were fabricated using IBM 130 nm process technology.

Findings

Current leakages are increasing with device scaling and reducing the charge retention time. During programming, charge traps may occur in the oxide and prevent further programming. Thus, the dominant factors are the reliability of oxide thickness to avoid charge traps and prevent current/charge leakages in the FG devices. The capacitive coupling (between the tunnelling and electron injection capacitors) may contribute to other reliability issues if not properly considered.

Originality/value

Although the results have raised further research questions, as revealed by certain reliability issues, they have shown that the use of FGs with nanoscale technology is promising and may be suitable for memory and switching applications.

Keywords

Acknowledgements

The prototype relating to this work was supported by the MOSIS Educational Program.

Citation

C. Mabuza, B. and Sinha, S. (2014), "The tunnelling and electron injection reliabilities for FG transistors", Microelectronics International, Vol. 31 No. 2, pp. 108-115. https://doi.org/10.1108/MI-01-2013-0001

Publisher

:

Emerald Group Publishing Limited

Copyright © 2014, Emerald Group Publishing Limited

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