The real-time generation of feature descriptors for object recognition is a challenging problem. In this research, the purpose of this paper is to provide a hardware friendly framework to generate sparse features that can be useful for key feature point selection, feature extraction, and descriptor construction. The inspiration is drawn from feature formation processes of the human brain, taking into account the sparse, modular, and hierarchical processing of visual information.
A sparse set of neurons referred as active neurons determines the feature points necessary for high-level vision applications such as object recognition. A psycho-physical mechanism of human low-level vision relates edge detection to noticeable local spatial stimuli, representing this set of active neurons. A cognitive memory cell array-based implementation of low-level vision is proposed. Applications of memory cell in edge detection are used for realizing human vision inspired feature selection and leading to feature vector construction for high-level vision applications.
True parallel architecture and faster response of cognitive circuits avoid time costly and redundant feature extraction steps. Validation of proposed feature vector toward high-level computer vision applications is demonstrated using standard object recognition databases. The comparison against existing state-of-the-art object recognition features and methods shows an accuracy of 97, 95, 69 percent for Columbia Object Image Library-100, ALOI, and PASCAL VOC 2007 databases indicating an increase from benchmark methods by 5, 3 and 10 percent, respectively.
A hardware friendly low-level sparse edge feature processing system is proposed for recognizing objects. The edge features are developed based on threshold logic of neurons, and the sparse selection of the features applies a modular and hierarchical processing inspired from the human neural system.
Thomas, N., Mathew, J. and James, A. (2016), "Threshold logic based low-level vision sparse object features", International Journal of Intelligent Computing and Cybernetics, Vol. 9 No. 4, pp. 314-324. https://doi.org/10.1108/IJICC-04-2016-0016Download as .RIS
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