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FPGA-realization of a speed control IC for induction motor drive

Ying-Shieh Kung (Department of Electrical Engineering, Southern Taiwan University of Science and Technology, Tainan, Taiwan)
Seng-Chi Chen (Department of Electrical Engineering, Southern Taiwan University of Science and Technology, Tainan, Taiwan)
Jin-Mu Lin (Department of Electrical Engineering, Southern Taiwan University of Science and Technology, Tainan, Taiwan)
Tsung-Chun Tseng (Department of Electrical Engineering, Southern Taiwan University of Science and Technology, Tainan, Taiwan)

Engineering Computations

ISSN: 0264-4401

Article publication date: 1 August 2016

193

Abstract

Purpose

The purpose of this paper is to integrate the function of a speed controller for induction motor (IM) drive, such as the speed PI controller, the current vector controller, the slip speed estimator, the space vector pulse width modulation scheme, the quadrature encoder pulse, and analog to digital converter interface circuit, etc. into one field programmable gate array (FPGA).

Design/methodology/approach

First, the mathematical modeling of an IM drive, the field-oriented control algorithm, and PI controller are derived. Second, the very high speed IC hardware description language (VHDL) is adopted to describe the behavior of the algorithms above. Third, based on electronic design automation simulator link, a co-simulation work constructed by ModelSim and Simulink is applied to verify the proposed VHDL code for the speed controller intellectual properties (IP). Finally, the developed VHDL code will be downloaded to the FPGA for further control the IM drive.

Findings

In realization aspect, it only needs 5,590 LEs, 196,608 RAM bits, and 14 embedded 9-bit multipliers in FPGA to build up a speed control IP. In computational power aspect, the operation time to complete the computation of the PI controller, the slip speed estimator, the current vector controller are only 0.28 μs, 0.72 μs, and 0.96 μs, respectively.

Practical implications

Fast computation in FPGA can speed up the speed response of IM drive system to increase the running performance.

Originality/value

This is the first time to realize all the function of a speed controller for IM drive within one FPGA.

Keywords

Acknowledgements

This work was supported by the Ministry of Science and Technology in ROC under Grant No. MOST 104-2221-E-218-012.

Citation

Kung, Y.-S., Chen, S.-C., Lin, J.-M. and Tseng, T.-C. (2016), "FPGA-realization of a speed control IC for induction motor drive", Engineering Computations, Vol. 33 No. 6, pp. 1835-1852. https://doi.org/10.1108/EC-08-2015-0260

Publisher

:

Emerald Group Publishing Limited

Copyright © 2016, Emerald Group Publishing Limited

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