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A novel MRTD model for signal integrity analysis of resistive driven coupled copper interconnects

Shashank Rebelli (Department of Electronics and Communication Engineering, National Institute of Technology, Warangal, India)
Bheema Rao Nistala (Department of Electronics and Communication Engineering, National Institute of Technology, Warangal, India)
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Abstract

Purpose

This paper aims to model the coupled on-chip Copper (Cu) interconnects by using the multiresolution time-domain (MRTD) method.

Design/methodology/approach

The proposed model is a wavelet-based numerical method for analyzing signal integrity and propagation delay of coupled on-chip interconnects. Moreover, the dependency of crosstalk noise and delay on coupling parasitics (L12, C12) are analyzed.

Findings

The proposed MRTD method captures the behaviour of propagation delay and peak crosstalk noise on victim line against coupling parasitics, which is in close agreement with that of H simulation program with integrated circuit emphasis (HSPICE). The average error for the proposed model is less than 1 per cent with respect to HSPICE for the estimation of peak crosstalk noise voltage.

Practical implications

Simulations are performed using HSPICE and compared with those performed using the proposed MRTD method for global interconnect length with 130-nm technology, where the computations of the proposed model are carried out using Matlab.

Originality/value

The MRTD method with its unique features is tailored for modelling interconnects. To build further credence to this and its profound existence in the latest state-of-art works, simulations of crosstalk noise and propagation delay, for coupled Cu interconnect lines, using MRTD and finite-difference time-domain (FDTD) are executed. The results illustrated the dominance of MRTD method over FDTD in terms of accuracy.

Keywords

Citation

Rebelli, S. and Nistala, B.R. (2018), "A novel MRTD model for signal integrity analysis of resistive driven coupled copper interconnects", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 37 No. 1, pp. 189-207. https://doi.org/10.1108/COMPEL-12-2016-0521

Publisher

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Emerald Publishing Limited

Copyright © 2018, Emerald Publishing Limited

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