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A method for fault diagnosis of nonlinear circuits

Michal Tadeusiewicz (Lodz University of Technology, Lodz, Poland)
Stanislaw Halgas (Lodz University of Technology, Lodz, Poland)

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering

ISSN: 0332-1649

Article publication date: 27 September 2019

Issue publication date: 15 November 2019

97

Abstract

Purpose

The purpose of this paper is to develop a method for multiple soft fault diagnosis of nonlinear circuits including fault detection, identification of faulty elements and estimation of their values in real circumstances.

Design/methodology/approach

The method for fault diagnosis proposed here uses a measurement test leading to a system of nonlinear equations expressing the measured quantities in terms of the circuit parameters. Nonlinear functions, which appear in these equations are not given in explicit analytical form. The equations are solved using a homotopy concept. A key problem of the solvability of the equations is considered locally while tracing the solution path. Actual faults are selected on the basis of the observation that the probability of faults in fewer number of elements is greater than in a larger number of elements.

Findings

The results indicate that the method is an effective tool for testing nonlinear circuits including bipolar junction transistors and junction field effect transistors.

Originality/value

The homotopy method is generalized and associated with a restart procedure and a numerical algorithm for solving differential equations. Testable sets of elements are found using the singular value decomposition. The procedure for selecting faulty elements, based on the minimal fault number rule, is developed. The method comprises both theoretical and practical aspects of fault diagnosis.

Keywords

Citation

Tadeusiewicz, M. and Halgas, S. (2019), "A method for fault diagnosis of nonlinear circuits", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 38 No. 6, pp. 1770-1781. https://doi.org/10.1108/COMPEL-03-2019-0101

Publisher

:

Emerald Publishing Limited

Copyright © 2019, Emerald Publishing Limited

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