Thermal fatigue analysis of the flip chip assembly on the polymer stud grid array (PSGA) package

Abstract

Presents the thermo‐mechanical modelling of a new type of area array package: the flip chip on polymer stud grid array (PSGA). The objective is to optimise the material and geometrical design of this PSGA package and the flip chip assembly in order to achieve the highest thermal fatigue reliability for the solder joints in this structure. A parameterised non‐linear finite element model is used to calculate the inelastic strains induced in the solder joints due to thermal cycling. The techniques of design of experiments (DOE) and response surface modelling (RSM) enhance the parameter sensitivity analysis and optimisation of the PSGA design. After the optimisation of the structure, a very high solder joint fatigue reliability of this flip chip to PSGA package has been achieved.

Citation

Vandevelde, B. and Beyne, E. (1999), "Thermal fatigue analysis of the flip chip assembly on the polymer stud grid array (PSGA) package", Microelectronics International, Vol. 16 No. 3, pp. 15-21. https://doi.org/10.1108/13565369910293305