To read this content please select one of the options below:

Design of SIPC‐based complementary LC‐QVCO in 0.18‐μm CMOS technology for WiMAX application

Harikrishnan Ramiah (Department of Electrical Engineering, Faculty of Engineering, University of Malaya, Kuala Lumpur, Malaysia)
Tun Zainal Azni Zulkifli (RMIC Design Group, School of Electrical and Electronic Engineering, Universiti Sains Malaysia, Penang, Malaysia)
Noramalia Sapiee (RMIC Design Group, School of Electrical and Electronic Engineering, Universiti Sains Malaysia, Penang, Malaysia)

Microelectronics International

ISSN: 1356-5362

Article publication date: 26 January 2010

484

Abstract

Purpose

The purpose of this paper is to design and realize a low‐phase noise, high‐output power, and high‐tuning range, fully integrated source injection parallel coupled (SIPC)‐based inductor‐capacitor (LC)‐quadrature voltage controlled oscillator (QVCO) covering WiMAX frequency range in 0.18‐μm deep submicron CMOS technology.

Design/methodology/approach

A pMOS based‐SIPC LC‐QVCO topology is realized with the center frequency of 2.58 GHz. On chip spiral inductor is integrated with substantial quality factor, Q coupled with underlying pattern ground shield (PGS) shielding. An enhanced tuning range is achieved by integrating the diode connected MOS‐based varactors. The CMOS‐based autonomous SIPC LC‐QVCO circuit was characterized for its output phase noise, tuning range and power spectrum response via wafer probing, utilizing a signal source analyzer (Agilent E5052 A).

Findings

A quadrature oscillator catering to the needs of local oscillator (LO) generation covering the frequency range of WiMAX is realized. The parallel coupled architecture adapts direct source coupling, bypassing the LC resonator tank and relaxes the close in phase noise up‐conversion. The design consumes 2.19 mm2 of active chip area and measures a phase noise of −114.34 dBc/Hz at 1 MHz of offset frequency with 2.67 GHz of output frequency at 0.9 V of input tuning voltage. The corresponding output power measures to be −10.1 dBm, well suited for mixer hard switching. The design is realized in one poly, six metal 0.18‐μm standard CMOS technology.

Research limitations/implications

Owing to convergence discrepancy in the analysis, a diode‐connected MOS varactor is adapted in contrary to the accumulation mode MOS varactors with superior tuning range.

Practical implications

The designed SIPC LC‐QVCO is of need in the generation of low‐phase noise, highly matched quadrature LO generation covering the WiMAX frequency range. The adapted parallel coupling also relaxes the voltage headroom limitation.

Originality/value

This paper shows how a fully integrated CMOS‐based SIPC LC‐QVCO architecture is adapted with low‐output phase noise and low voltage headroom consumption covering the WiMAX frequency range.

Keywords

Citation

Ramiah, H., Zainal Azni Zulkifli, T. and Sapiee, N. (2010), "Design of SIPC‐based complementary LC‐QVCO in 0.18‐μm CMOS technology for WiMAX application", Microelectronics International, Vol. 27 No. 1, pp. 39-44. https://doi.org/10.1108/13565361011009513

Publisher

:

Emerald Group Publishing Limited

Copyright © 2010, Emerald Group Publishing Limited

Related articles