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Thermal investigations of microelectronic chip with non‐uniform power distribution: temperature prediction and thermal placement design optimization

Teck Joo Goh (Platform Architecture and Solution Division, Intel Products (Shanghai) Ltd, People's Republic of China)
K.N. Seetharamu (School of Mechanical Engineering, Universiti Sains Malaysia, Penang, Malaysia)
G.A. Quadir (School of Mechanical Engineering, Universiti Sains Malaysia, Penang, Malaysia)
Z.A. Zainal (School of Mechanical Engineering, Universiti Sains Malaysia, Penang, Malaysia)
K. Jeevan Ganeshamoorthy (School of Mechanical Engineering, Universiti Sains Malaysia, Penang, Malaysia)

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 December 2004

Abstract

This paper presents the thermal analyses carried out to predict the temperature distribution of the silicon chip with non‐uniform power dissipation patterns and to determine the optimal locations of power generating sources in silicon chip design layout that leads to the desired junction temperature, Tj. Key thermal parameters investigated are the heat source placement distance, level of heat dissipation, and magnitude of convection heat transfer coefficient. Finite element method (FEM) is used to investigate the effect of the key parameters. From the FEM results, a multiple linear regression model employing the least‐square method is developed that relates all three parameters into a single correlation which would predict the maximum junction temperature, Tj,max.

Keywords

Citation

Joo Goh, T., Seetharamu, K.N., Quadir, G.A., Zainal, Z.A. and Jeevan Ganeshamoorthy, K. (2004), "Thermal investigations of microelectronic chip with non‐uniform power distribution: temperature prediction and thermal placement design optimization", Microelectronics International, Vol. 21 No. 3, pp. 29-43. https://doi.org/10.1108/13565360410549701

Publisher

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Emerald Group Publishing Limited

Copyright © 2004, Emerald Group Publishing Limited