Strain range fatigue life assessment of lead‐free solder interconnects subject to temperature cycle loading

Abstract

Purpose

The aim is to present temperature fatigue model constants for lead‐free tin‐silver‐copper solder derived from test data and demonstrate the validity of the model using published experimental results.

Design/methodology/approach

Temperature cycle fatigue life data were collected from a controlled set of tests using ceramic leadless chip carriers. Using a regression algorithm, temperature cycle fatigue model constants were derived from fatigue life data. The model was then applied to a variety of package formats including ball grid arrays, quad flatpack and thin small outline packages to determine the validity of the model and constants.

Findings

The temperature cycle fatigue life experimental data were found to be in good agreement with the model with the derived model constants for various package types. Using this model, engineers can determine acceleration factors between test and field temperature cycle conditions.

Research limitations/implications

The technology has been used to ensure inner layer designs with nominal dimensions after the lamination stage. Further, development work should be undertaken to collate measured data from other parts of the PCB manufacturing process and model the material movement around all registration critical processes.

Originality/value

The paper details a temperature cycle fatigue life model and constants that allow engineers to predict field life expectancy and determine the acceleration factor between temperature cycle testing and field use conditions.

Citation

Osterman, M. and Pecht, M. (2007), "Strain range fatigue life assessment of lead‐free solder interconnects subject to temperature cycle loading", Soldering & Surface Mount Technology, Vol. 19 No. 2, pp. 12-17. https://doi.org/10.1108/09540910710836494