Interlaminar short circuit detection: modeling and measurement

Abstract

Purpose

Interlaminar short circuits in turbo generator stators can lead to local damage of the iron core. The purpose of this paper is to model an interlaminar short circuit diagnosis test on an existing structure.

Design/methodology/approach

This work presents the modeling of short‐circuited laminations in a stator yoke of a turbo‐generator. A 3D finite element model, associated to a homogenization technique, is used to calculate the short‐circuit current. The diagnosis test known as El Cid has been modelled as well.

Findings

Calculation results are compared with the experiment. The same tendency has been observed both in experimental and numerical results.

Research limitations/implications

Additional calculations may be performed (parametric studies) in order to investigate El Cid measuring under different conditions (different material properties, fault position, size), which may lead to a better interpretation of the results.

Practical implications

Modelling of short circuit diagnosis tests under different conditions may help with the interpretation of measuring results, predicting the fault size/seriousness and location. So, only the concerned parts of the stator have to be disassembled and repaired/rebuilt.

Originality/value

It is not easy to model numerically a structure with a short circuit inside, since different dimensions are involved: the fault and the varnish between laminations are much smaller than the stator itself. Thus, homogenization techniques have been used to model the lamination stack region. The combination of this technique with the modelling of the El Cid test constitutes a tool to study this kind of fault and calculate its severity and location in a stator.

Citation

Luísa Müller, J., Romary, R., Benabou, A., Henneron, T., Piriou, F., Pedro Assumpção Bastos, J. and Roger, J. (2012), "Interlaminar short circuit detection: modeling and measurement", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 31 No. 5, pp. 1448-1457. https://doi.org/10.1108/03321641211248156