The purpose of this paper is to develop a method for finding all the DC solutions in nonlinear circuits with the thermal constraint.
The proposed approach employs an algorithm for finding all the DC solutions without thermal constraint, including a new contraction and elimination method, an efficient method for tracing characteristics expressing voltages and power in terms of temperature, and electrical analog of the chip thermal behavior.
The paper brings a method that guarantees finding all the DC solutions, considering thermal behavior of the chip, in mid‐scale practical transistor circuits.
A new contraction and elimination method, being the core of the algorithm for finding all the DC solutions, is proposed. An approach enabling us to consider a feedback between the power dissipated inside the chip and the temperature, which affects the circuit parameters and consequently the solutions is developed.
Tadeusiewicz, M. and Hałgas, S. (2011), "Analysis of transistor circuits having multiple DC solutions with the thermal constraint", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 30 No. 4, pp. 1350-1362. https://doi.org/10.1108/03321641111133244Download as .RIS
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