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Output characteristics analysis for n‐buried‐PSOI sandwiched RF power LDMOS

Zehong Li (State Key Laboratory of Electronic Thin Films and Integrated Devices of UESTC, Chengdu, China)
Yong Liu (National Laboratory of Analog Integrated Circuits, Chongqing, China Sichuan Institute of Solid‐State Circuits, Chongqing, China)
Lijuan Wu (State Key Laboratory of Electronic Thin Films and Integrated Devices of UESTC, Chengdu, China)
Li Yi (State Key Laboratory of Electronic Thin Films and Integrated Devices of UESTC, Chengdu, China)
Bo Zhang (State Key Laboratory of Electronic Thin Films and Integrated Devices of UESTC, Chengdu, China)
Zhaoji Li (State Key Laboratory of Electronic Thin Films and Integrated Devices of UESTC, Chengdu, China)

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering

ISSN: 0332-1649

Article publication date: 9 March 2010

150

Abstract

Purpose

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The purpose of this paper is to present a novel n‐buried‐PSOI sandwiched radio frequencies (RF) power lateral diffused metal‐oxide semiconductor (LDMOS) and analyze its output characteristics.

Design/methodology/approach

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The small‐signal equivalent circuit for RF power LDMOS method is used to analyze the proposed structure and the simulation and optimization are done using the computer‐aided design tools.

Findings

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This improved structure is clearly decreasing drain‐substrate parasitic capacitance. At 1 dB compression point, its output power, the power‐added efficiency and the breakdown voltage are higher than that of the conventional LDMOS.

Originality/value

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This paper puts forward a novel n‐buried‐PSOI sandwiched structure of RF power LDMOS. The analysis indicates that the output characteristics of this device are a great improvement on the conventional LDMOS and the n‐buried‐PSOI, RF power LDMOS proposed by earlier authors.

Keywords

Citation

Li, Z., Liu, Y., Wu, L., Yi, L., Zhang, B. and Li, Z. (2010), "Output characteristics analysis for n‐buried‐PSOI sandwiched RF power LDMOS", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 29 No. 2, pp. 528-535. https://doi.org/10.1108/03321641011014995

Publisher

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Emerald Group Publishing Limited

Copyright © 2010, Emerald Group Publishing Limited

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