Effects of High Electrical Stress in PCBs

C. Travi (Zincocelere Srl, Cavaglia (VC) Italy)
M. Albertini* (*Electrical Engineering Department, University of Genova, Genova, Italy)
C. Gemme* (*Electrical Engineering Department, University of Genova, Genova, Italy)

Circuit World

ISSN: 0305-6120

Publication date: 1 August 1996


The increasing level of integration in PCB technology demands from the designer a new level of sensitivity to high electrical field problems and to the degradation processes that may be involved. High electrical fields interacting with thermal and mechanical stresses could lead to the growth of ‘latent defects’, not easily identifiable during final stage acceptance tests, that could lead the PCB's failure during service. The paper discusses degradation mechanisms which can lead to dielectric failure, together with first results relevant to a wider research project regarding identification of latent defects in PCBs and the development of new test procedures.



Travi, C., Albertini*, M. and Gemme*, C. (1996), "Effects of High Electrical Stress in PCBs", Circuit World, Vol. 22 No. 2, pp. 16-18. https://doi.org/10.1108/03056129610799930

Download as .RIS




Copyright © 1996, MCB UP Limited

Please note you might not have access to this content

You may be able to access this content by login via Shibboleth, Open Athens or with your Emerald account.
If you would like to contact us about accessing this content, click the button and fill out the form.
To rent this content from Deepdyve, please click the button.