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Towards a PCB production floor metric for go/no go testing of lossy high speed transmission lines

Brandon Gore (Intel Corporation, Columbia, South Carolina, USA)
Richard Mellitz (Intel Corporation, Columbia, South Carolina, USA)
Jeff Loyer (Intel Corporation, Columbia, South Carolina, USA)
Martyn Gaudion (Polar Instruments, Guernsey, UK)
Jean Burnikell (Polar Instruments, Guernsey, UK)
Paul Carre (Polar Instruments, Guernsey, UK)

Circuit World

ISSN: 0305-6120

Article publication date: 21 November 2008

293

Abstract

Purpose

The aim of this paper is to demonstrate that root impulse energy (RIE) testing is a practical and robust “go/no go” test technique for PCB material losses that can be deployed on the PCB production floor.

Design/methodology/approach

The study used the RIE method, employing time domain reflectometry techniques on industry standard impedance test coupons modified to include short reference lines and longer test lines. Practical considerations for the use of the methodology on the production floor, such as coupon design, probe layout and environmental conditions were investigated.

Findings

RIE with a 250 ps reflected risetime appears suitable for discerning significant differences in material loss properties provided proper coupon design is incorporated into the panel design and frequencies of interest are limited to a limit commensurate with high reliability and repeatability.

Research limitations/implications

The RIE test proposed does not replace conventional impedance control techniques that are currently in use. However, a suitable standard for loss and cross test equipment calibration is key and will need to be established before this new measurement technique can gain widespread trust throughout the industry.

Originality/value

The paper shows RIE testing is a practical and achievable test method; it is easily deployed and offers repeatable, reliable discrimination between PCBs fabricated with a range of varying base material loss characteristics.

Keywords

Citation

Gore, B., Mellitz, R., Loyer, J., Gaudion, M., Burnikell, J. and Carre, P. (2008), "Towards a PCB production floor metric for go/no go testing of lossy high speed transmission lines", Circuit World, Vol. 34 No. 4, pp. 38-47. https://doi.org/10.1108/03056120810918114

Publisher

:

Emerald Group Publishing Limited

Copyright © 2008, Emerald Group Publishing Limited

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