Aims to design a heterogeneous embedded system with CPLD and microcontroller as co‐processors sharing a memory module.
The system receives external analog input signal, which is applied to the PIC 16F73 microcontroller. Upon converting the data in to digital format using the on‐chip ADC, the PIC stores the digitized version in the SRAM (HCM 6264) chip. SRAM HCM 6264 has been used as a shared memory model, of which both the PIC and CPLD can access all the locations. Once the PIC passes controls to the CPLD, the further processing is carried out by the CPLD without any intervention of the PIC. This is a true example of co‐processing of the architecturally diversified computing modules from completely different vendors with totally different programming suits.
The board has been tested with IC temperature sensors and also found to be useful for sensor array applications involving three types of processing viz. analog (through instrumentation amplifier), real‐time digital (through microcontroller) and customized reconfigurable digital (with the CPLD).
The system has several potential applications in avionics, military and robotic embedded systems, which have inherent real‐time constraints that need to be supported by the underlying hardware and driver programs.
Discusses the rare and unique combination of diversified processing core to build an embedded system.
Shrikrishna Parab, J., Sadanand Paliekar Porob, R., Roy Francis Joseph, K., Vishwanath Naik, K., Kamat, R. and Naik, G. (2005), "Heterogeneous embedded system with “microcontroller‐CPLD” based shared memory interface for sensor applications", Sensor Review, Vol. 25 No. 4, pp. 287-291. https://doi.org/10.1108/02602280510620132Download as .RIS
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